Summary: This will result opcode MULX32Hrm been emitted to MULX32Hrr.
Reviewed by: craig.topper
Differential Revision: https://reviews.llvm.org/D82472
switch (OutMI.getOpcode()) {
default: llvm_unreachable("Invalid opcode");
case X86::MULX32Hrr: NewOpc = X86::MULX32rr; break;
- case X86::MULX32Hrm: NewOpc = X86::MULX32rr; break;
+ case X86::MULX32Hrm: NewOpc = X86::MULX32rm; break;
case X86::MULX64Hrr: NewOpc = X86::MULX64rr; break;
case X86::MULX64Hrm: NewOpc = X86::MULX64rm; break;
}
; CHECK: # %bb.0:
; CHECK-NEXT: movl {{[0-9]+}}(%esp), %eax
; CHECK-NEXT: movl $-2004318071, %edx # imm = 0x88888889
-; CHECK-NEXT: mulxl %eax, %eax, %eax
+; CHECK-NEXT: mulxl (%eax), %eax, %eax
; CHECK-NEXT: shrl $3, %eax
; CHECK-NEXT: retl
%v = load i32, i32* %p, align 4