Convert CONFIG_SYS_NAND_MAX_CHIPS to Kconfig
authorTom Rini <trini@konsulko.com>
Wed, 22 Sep 2021 18:50:36 +0000 (14:50 -0400)
committerTom Rini <trini@konsulko.com>
Wed, 6 Oct 2021 13:16:24 +0000 (09:16 -0400)
This converts the following to Kconfig:
   CONFIG_SYS_NAND_MAX_CHIPS

Signed-off-by: Tom Rini <trini@konsulko.com>
drivers/mtd/Kconfig
drivers/mtd/nand/raw/Kconfig
include/configs/MCR3000.h
include/configs/cm_fx6.h
include/configs/etamin.h
include/configs/ids8313.h
include/configs/mvebu_armada-8k.h
include/configs/presidio_asic.h
include/configs/ti_armv7_keystone2.h
include/linux/mtd/bbm.h

index b303fab..83c055a 100644 (file)
@@ -111,6 +111,14 @@ config HBMC_AM654
 
 source "drivers/mtd/nand/Kconfig"
 
+config SYS_NAND_MAX_CHIPS
+       int "NAND max chips"
+       depends on MTD_RAW_NAND || CMD_ONENAND || TARGET_S5PC210_UNIVERSAL || \
+               SPL_OMAP3_ID_NAND
+       default 1
+       help
+         The maximum number of NAND chips per device to be supported.
+
 source "drivers/mtd/spi/Kconfig"
 
 source "drivers/mtd/ubi/Kconfig"
index 796041a..7da3983 100644 (file)
@@ -423,13 +423,6 @@ config SYS_NAND_BUSWIDTH_16BIT
            not available while configuring controller. So a static CONFIG_NAND_xx
            is needed to know the device's bus-width in advance.
 
-config SYS_NAND_MAX_CHIPS
-       int "NAND max chips"
-       default 1
-       depends on NAND_ARASAN
-       help
-         The maximum number of NAND chips per device to be supported.
-
 if SPL
 
 config SYS_NAND_5_ADDR_CYCLE
index 65c1638..73858c5 100644 (file)
@@ -95,7 +95,6 @@
 
 /* NAND configuration part */
 #define CONFIG_SYS_MAX_NAND_DEVICE     1
-#define CONFIG_SYS_NAND_MAX_CHIPS      1
 #define CONFIG_SYS_NAND_BASE           0x0C000000
 
 #endif /* __CONFIG_H */
index 8c26c68..7545979 100644 (file)
 /* NAND */
 #ifndef CONFIG_SPL_BUILD
 #define CONFIG_SYS_NAND_BASE           0x40000000
-#define CONFIG_SYS_NAND_MAX_CHIPS      1
 #define CONFIG_SYS_MAX_NAND_DEVICE     1
 /* APBH DMA is required for NAND support */
 #endif
index ca5fac9..e084a9f 100644 (file)
@@ -51,8 +51,6 @@
 
 #define CONFIG_SYS_NAND_U_BOOT_OFFS     0x200000
 
-#define CONFIG_SYS_NAND_MAX_CHIPS       1
-
 #undef CONFIG_SYS_MAX_NAND_DEVICE
 #define CONFIG_SYS_MAX_NAND_DEVICE      3
 #define CONFIG_SYS_NAND_BASE2           (0x18000000)    /* physical address */
index 5bd4f3b..5e2f377 100644 (file)
  */
 #define CONFIG_SYS_NAND_BASE           0xE1000000
 #define CONFIG_SYS_MAX_NAND_DEVICE     1
-#define CONFIG_SYS_NAND_MAX_CHIPS      1
 #define CONFIG_NAND_FSL_ELBC
 #define NAND_CACHE_PAGES               64
 
index cb8ccb3..2f8be2e 100644 (file)
@@ -33,7 +33,6 @@
 /* When runtime detection fails this is the default */
 
 #define CONFIG_SYS_MAX_NAND_DEVICE     1
-#define CONFIG_SYS_NAND_MAX_CHIPS      1
 
 /*
  * Ethernet Driver configuration
index b22e676..8d689d9 100644 (file)
@@ -78,7 +78,6 @@
 /* nand driver parameters */
 #ifdef CONFIG_TARGET_PRESIDIO_ASIC
        #define CONFIG_SYS_MAX_NAND_DEVICE      1
-       #define CONFIG_SYS_NAND_MAX_CHIPS       1
        #define CONFIG_SYS_NAND_BASE            CONFIG_SYS_FLASH_BASE
        #define CONFIG_SYS_NAND_BASE_LIST       { CONFIG_SYS_NAND_BASE }
 #endif
index a6d7b8a..8b0dd49 100644 (file)
@@ -94,7 +94,6 @@
 #define CONFIG_SYS_NAND_LARGEPAGE
 #define CONFIG_SYS_NAND_BASE_LIST              { 0x30000000, }
 #define CONFIG_SYS_MAX_NAND_DEVICE             1
-#define CONFIG_SYS_NAND_MAX_CHIPS              1
 #define CONFIG_SYS_NAND_NO_SUBPAGE_WRITE
 
 #define DFU_ALT_INFO_MMC \
index 7239eb1..fb86f1d 100644 (file)
 #ifndef __LINUX_MTD_BBM_H
 #define __LINUX_MTD_BBM_H
 
-/* The maximum number of NAND chips in an array */
-#ifndef CONFIG_SYS_NAND_MAX_CHIPS
-#define CONFIG_SYS_NAND_MAX_CHIPS      1
-#endif
-
 /**
  * struct nand_bbt_descr - bad block table descriptor
  * @options:   options for this descriptor