drm/amdgpu: enable hibernate support on Navi1X
authorEvan Quan <evan.quan@amd.com>
Thu, 7 May 2020 10:17:55 +0000 (18:17 +0800)
committerAlex Deucher <alexander.deucher@amd.com>
Fri, 8 May 2020 18:52:53 +0000 (14:52 -0400)
BACO is needed to support hibernate on Navi1X.

Signed-off-by: Evan Quan <evan.quan@amd.com>
Acked-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Cc: stable@vger.kernel.org
drivers/gpu/drm/amd/amdgpu/amdgpu.h
drivers/gpu/drm/amd/amdgpu/amdgpu_drv.c
drivers/gpu/drm/amd/powerplay/amdgpu_smu.c

index 2992a49..8ac1581 100644 (file)
@@ -945,6 +945,7 @@ struct amdgpu_device {
 
        /* s3/s4 mask */
        bool                            in_suspend;
+       bool                            in_hibernate;
 
        /* record last mm index being written through WREG32*/
        unsigned long last_mm_index;
index 466bfe5..a735d79 100644 (file)
@@ -1181,7 +1181,9 @@ static int amdgpu_pmops_freeze(struct device *dev)
        struct amdgpu_device *adev = drm_dev->dev_private;
        int r;
 
+       adev->in_hibernate = true;
        r = amdgpu_device_suspend(drm_dev, true);
+       adev->in_hibernate = false;
        if (r)
                return r;
        return amdgpu_asic_reset(adev);
index 09fa685..e770469 100644 (file)
@@ -1476,7 +1476,7 @@ static int smu_disable_dpm(struct smu_context *smu)
        bool use_baco = !smu->is_apu &&
                ((adev->in_gpu_reset &&
                  (amdgpu_asic_reset_method(adev) == AMD_RESET_METHOD_BACO)) ||
-                (adev->in_runpm && amdgpu_asic_supports_baco(adev)));
+                ((adev->in_runpm || adev->in_hibernate) && amdgpu_asic_supports_baco(adev)));
 
        ret = smu_get_smc_version(smu, NULL, &smu_version);
        if (ret) {