[NDS32] New option -minline-asm-r15.

gcc/
	* config/nds32/nds32.c
	(nds32_md_asm_adjust): Consider flag_inline_asm_r15 variable.
	* config/nds32/nds32.opt (minline-asm-r15): New option.

From-SVN: r260400

diff --git a/gcc/ChangeLog b/gcc/ChangeLog
index fb25925..97aa4e7 100644 (file)
--- a/gcc/ChangeLog
+++ b/gcc/ChangeLog
@@ -1,5 +1,11 @@
 2018-05-19  Chung-Ju Wu  <jasonwucj@gmail.com>
 
+       * config/nds32/nds32.c
+       (nds32_md_asm_adjust): Consider flag_inline_asm_r15 variable.
+       * config/nds32/nds32.opt (minline-asm-r15): New option.
+
+2018-05-19  Chung-Ju Wu  <jasonwucj@gmail.com>
+
        * common/config/nds32/nds32-common.c (TARGET_DEFAULT_TARGET_FLAGS): Add
        MASK_HW_ABS.
        * config/nds32/nds32.md (abssi2): New pattern.

diff --git a/gcc/config/nds32/nds32.c b/gcc/config/nds32/nds32.c
index b705ae6..632a544 100644 (file)
--- a/gcc/config/nds32/nds32.c
+++ b/gcc/config/nds32/nds32.c
@@ -4066,8 +4066,11 @@ nds32_md_asm_adjust (vec<rtx> &outputs ATTRIBUTE_UNUSED,
                     vec<const char *> &constraints ATTRIBUTE_UNUSED,
                     vec<rtx> &clobbers, HARD_REG_SET &clobbered_regs)
 {
-  clobbers.safe_push (gen_rtx_REG (SImode, TA_REGNUM));
-  SET_HARD_REG_BIT (clobbered_regs, TA_REGNUM);
+  if (!flag_inline_asm_r15)
+    {
+      clobbers.safe_push (gen_rtx_REG (SImode, TA_REGNUM));
+      SET_HARD_REG_BIT (clobbered_regs, TA_REGNUM);
+    }
   return NULL;
 }
 

diff --git a/gcc/config/nds32/nds32.opt b/gcc/config/nds32/nds32.opt
index 9e48154..a9cd72c 100644 (file)
--- a/gcc/config/nds32/nds32.opt
+++ b/gcc/config/nds32/nds32.opt
@@ -446,3 +446,7 @@ Always save $lp in the stack.
 munaligned-access
 Target Report Var(flag_unaligned_access) Init(0)
 Enable unaligned word and halfword accesses to packed data.
+
+minline-asm-r15
+Target Report Var(flag_inline_asm_r15) Init(0)
+Allow use r15 for inline ASM.