radeon/llvm: Expand vector fadd and fmul on R600
authorTom Stellard <thomas.stellard@amd.com>
Thu, 13 Sep 2012 15:14:26 +0000 (15:14 +0000)
committerTom Stellard <thomas.stellard@amd.com>
Fri, 21 Sep 2012 19:30:57 +0000 (19:30 +0000)
src/gallium/drivers/radeon/R600ISelLowering.cpp

index e84983d..36ca246 100644 (file)
@@ -34,6 +34,9 @@ R600TargetLowering::R600TargetLowering(TargetMachine &TM) :
   addRegisterClass(MVT::i32, &AMDGPU::R600_Reg32RegClass);
   computeRegisterProperties();
 
+  setOperationAction(ISD::FADD, MVT::v4f32, Expand);
+  setOperationAction(ISD::FMUL, MVT::v4f32, Expand);
+
   setOperationAction(ISD::BR_CC, MVT::i32, Custom);
   setOperationAction(ISD::BR_CC, MVT::f32, Custom);