staging: rtl8192e: Rename MCSTxPowerL.., LegacyHTTxPowe.. and AntennaTx..
authorPhilipp Hortmann <philipp.g.hortmann@gmail.com>
Mon, 9 Jan 2023 19:09:05 +0000 (20:09 +0100)
committerGreg Kroah-Hartman <gregkh@linuxfoundation.org>
Tue, 17 Jan 2023 18:28:51 +0000 (19:28 +0100)
Rename variable MCSTxPowerLevelOriginalOffset to
mcs_tx_pwr_level_org_offset, LegacyHTTxPowerDiff to legacy_ht_tx_pwr_diff
and AntennaTxPwDiff to antenna_tx_pwr_diff to avoid CamelCase which is not
accepted by checkpatch.

Signed-off-by: Philipp Hortmann <philipp.g.hortmann@gmail.com>
Link: https://lore.kernel.org/r/271b3a9e1c23593e9ead925eb8415a584058fb56.1673290428.git.philipp.g.hortmann@gmail.com
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
drivers/staging/rtl8192e/rtl8192e/r8190P_rtl8256.c
drivers/staging/rtl8192e/rtl8192e/r8192E_dev.c
drivers/staging/rtl8192e/rtl8192e/r8192E_phy.c
drivers/staging/rtl8192e/rtl8192e/rtl_core.h

index 7517ec0..1672a3f 100644 (file)
@@ -169,7 +169,7 @@ void rtl92e_set_ofdm_tx_power(struct net_device *dev, u8 powerlevel)
        u16 RegOffset[6] = {0xe00, 0xe04, 0xe10, 0xe14, 0xe18, 0xe1c};
        u8 byte0, byte1, byte2, byte3;
 
-       powerBase0 = powerlevel + priv->LegacyHTTxPowerDiff;
+       powerBase0 = powerlevel + priv->legacy_ht_tx_pwr_diff;
        powerBase0 = (powerBase0 << 24) | (powerBase0 << 16) |
                     (powerBase0 << 8) | powerBase0;
        powerBase1 = powerlevel;
@@ -177,7 +177,7 @@ void rtl92e_set_ofdm_tx_power(struct net_device *dev, u8 powerlevel)
                     (powerBase1 << 8) | powerBase1;
 
        for (index = 0; index < 6; index++) {
-               writeVal = (u32)(priv->MCSTxPowerLevelOriginalOffset[index] +
+               writeVal = (u32)(priv->mcs_tx_pwr_level_org_offset[index] +
                           ((index < 2) ? powerBase0 : powerBase1));
                byte0 = writeVal & 0x7f;
                byte1 = (writeVal & 0x7f00) >> 8;
index ab9e226..06ab022 100644 (file)
@@ -413,12 +413,12 @@ static void _rtl92e_read_eeprom_info(struct net_device *dev)
                                priv->tx_pwr_level_ofdm_24g[i] =
                                         priv->EEPROMTxPowerLevelOFDM24G[i];
                        }
-                       priv->LegacyHTTxPowerDiff =
+                       priv->legacy_ht_tx_pwr_diff =
                                         priv->EEPROMLegacyHTTxPowerDiff;
-                       priv->AntennaTxPwDiff[0] = priv->EEPROMAntPwDiff & 0xf;
-                       priv->AntennaTxPwDiff[1] = (priv->EEPROMAntPwDiff &
+                       priv->antenna_tx_pwr_diff[0] = priv->EEPROMAntPwDiff & 0xf;
+                       priv->antenna_tx_pwr_diff[1] = (priv->EEPROMAntPwDiff &
                                                        0xf0) >> 4;
-                       priv->AntennaTxPwDiff[2] = (priv->EEPROMAntPwDiff &
+                       priv->antenna_tx_pwr_diff[2] = (priv->EEPROMAntPwDiff &
                                                        0xf00) >> 8;
                        priv->CrystalCap = priv->EEPROMCrystalCap;
                        priv->ThermalMeter[0] = priv->EEPROMThermalMeter & 0xf;
@@ -456,11 +456,11 @@ static void _rtl92e_read_eeprom_info(struct net_device *dev)
                                priv->tx_pwr_level_ofdm_24g_c[i] =
                                         priv->EEPROMRfCOfdmChnlTxPwLevel[2];
                        }
-                       priv->LegacyHTTxPowerDiff =
+                       priv->legacy_ht_tx_pwr_diff =
                                 priv->EEPROMLegacyHTTxPowerDiff;
-                       priv->AntennaTxPwDiff[0] = 0;
-                       priv->AntennaTxPwDiff[1] = 0;
-                       priv->AntennaTxPwDiff[2] = 0;
+                       priv->antenna_tx_pwr_diff[0] = 0;
+                       priv->antenna_tx_pwr_diff[1] = 0;
+                       priv->antenna_tx_pwr_diff[2] = 0;
                        priv->CrystalCap = priv->EEPROMCrystalCap;
                        priv->ThermalMeter[0] = priv->EEPROMThermalMeter & 0xf;
                        priv->ThermalMeter[1] = (priv->EEPROMThermalMeter &
index 19c65aa..cc7e72f 100644 (file)
@@ -535,9 +535,9 @@ static bool _rtl92e_bb_config_para_file(struct net_device *dev)
 
        if (priv->IC_Cut  > VERSION_8190_BD) {
                if (priv->rf_type == RF_2T4R)
-                       dwRegValue = priv->AntennaTxPwDiff[2]<<8 |
-                                     priv->AntennaTxPwDiff[1]<<4 |
-                                     priv->AntennaTxPwDiff[0];
+                       dwRegValue = priv->antenna_tx_pwr_diff[2] << 8 |
+                                     priv->antenna_tx_pwr_diff[1] << 4 |
+                                     priv->antenna_tx_pwr_diff[0];
                else
                        dwRegValue = 0x0;
                rtl92e_set_bb_reg(dev, rFPGA0_TxGainStage,
@@ -561,17 +561,17 @@ void rtl92e_get_tx_power(struct net_device *dev)
 {
        struct r8192_priv *priv = rtllib_priv(dev);
 
-       priv->MCSTxPowerLevelOriginalOffset[0] =
+       priv->mcs_tx_pwr_level_org_offset[0] =
                rtl92e_readl(dev, rTxAGC_Rate18_06);
-       priv->MCSTxPowerLevelOriginalOffset[1] =
+       priv->mcs_tx_pwr_level_org_offset[1] =
                rtl92e_readl(dev, rTxAGC_Rate54_24);
-       priv->MCSTxPowerLevelOriginalOffset[2] =
+       priv->mcs_tx_pwr_level_org_offset[2] =
                rtl92e_readl(dev, rTxAGC_Mcs03_Mcs00);
-       priv->MCSTxPowerLevelOriginalOffset[3] =
+       priv->mcs_tx_pwr_level_org_offset[3] =
                rtl92e_readl(dev, rTxAGC_Mcs07_Mcs04);
-       priv->MCSTxPowerLevelOriginalOffset[4] =
+       priv->mcs_tx_pwr_level_org_offset[4] =
                rtl92e_readl(dev, rTxAGC_Mcs11_Mcs08);
-       priv->MCSTxPowerLevelOriginalOffset[5] =
+       priv->mcs_tx_pwr_level_org_offset[5] =
                rtl92e_readl(dev, rTxAGC_Mcs15_Mcs12);
 
        priv->DefaultInitialGain[0] = rtl92e_readb(dev, rOFDM0_XAAGCCore1);
@@ -609,13 +609,13 @@ void rtl92e_set_tx_power(struct net_device *dev, u8 channel)
 
                        ant_pwr_diff &= 0xf;
 
-                       priv->AntennaTxPwDiff[2] = 0;
-                       priv->AntennaTxPwDiff[1] = (u8)(ant_pwr_diff);
-                       priv->AntennaTxPwDiff[0] = 0;
+                       priv->antenna_tx_pwr_diff[2] = 0;
+                       priv->antenna_tx_pwr_diff[1] = (u8)(ant_pwr_diff);
+                       priv->antenna_tx_pwr_diff[0] = 0;
 
-                       u4RegValue = priv->AntennaTxPwDiff[2]<<8 |
-                                     priv->AntennaTxPwDiff[1]<<4 |
-                                     priv->AntennaTxPwDiff[0];
+                       u4RegValue = priv->antenna_tx_pwr_diff[2] << 8 |
+                                     priv->antenna_tx_pwr_diff[1] << 4 |
+                                     priv->antenna_tx_pwr_diff[0];
 
                        rtl92e_set_bb_reg(dev, rFPGA0_TxGainStage,
                                          (bXBTxAGC|bXCTxAGC|bXDTxAGC),
index ca61fc6..cc3e281 100644 (file)
@@ -469,16 +469,16 @@ struct r8192_priv {
        s8 cck_present_attn;
        long undecorated_smoothed_pwdb;
 
-       u32 MCSTxPowerLevelOriginalOffset[6];
+       u32 mcs_tx_pwr_level_org_offset[6];
        u8 tx_pwr_level_cck[14];
        u8 tx_pwr_level_cck_a[14];
        u8 tx_pwr_level_cck_c[14];
        u8 tx_pwr_level_ofdm_24g[14];
        u8 tx_pwr_level_ofdm_24g_a[14];
        u8 tx_pwr_level_ofdm_24g_c[14];
-       u8              LegacyHTTxPowerDiff;
+       u8 legacy_ht_tx_pwr_diff;
        s8              RF_C_TxPwDiff;
-       u8              AntennaTxPwDiff[3];
+       u8 antenna_tx_pwr_diff[3];
 
        bool            bDynamicTxHighPower;
        bool            bDynamicTxLowPower;