drm/amd/dal: Add POLARIS12 support (v2)

v2: agd: squash in dm fix, rebase

Signed-off-by: Jordan Lazare <Jordan.Lazare@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>

diff --git a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c b/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c
index e5ba232..2a7802c 100644 (file)
--- a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c
+++ b/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c
@@ -1235,6 +1235,7 @@ int amdgpu_dm_initialize_drm_device(struct amdgpu_device *adev)
        case CHIP_STONEY:
        case CHIP_POLARIS11:
        case CHIP_POLARIS10:
+       case CHIP_POLARIS12:
                if (dce110_register_irq_handlers(dm->adev)) {
                        DRM_ERROR("DM: Failed to initialize IRQ\n");
                        return -1;
@@ -1472,6 +1473,7 @@ static int dm_early_init(void *handle)
                adev->mode_info.num_dig = 9;
                break;
        case CHIP_POLARIS11:
+       case CHIP_POLARIS12:
                adev->mode_info.num_crtc = 5;
                adev->mode_info.num_hpd = 5;
                adev->mode_info.num_dig = 5;

diff --git a/drivers/gpu/drm/amd/display/dc/core/dc_resource.c b/drivers/gpu/drm/amd/display/dc/core/dc_resource.c
index f552b04..343114b 100644 (file)
--- a/drivers/gpu/drm/amd/display/dc/core/dc_resource.c
+++ b/drivers/gpu/drm/amd/display/dc/core/dc_resource.c
@@ -60,7 +60,8 @@ enum dce_version resource_parse_asic_id(struct hw_asic_id asic_id)
                        break;
                }
                if (ASIC_REV_IS_POLARIS10_P(asic_id.hw_internal_rev) ||
-                               ASIC_REV_IS_POLARIS11_M(asic_id.hw_internal_rev)) {
+                               ASIC_REV_IS_POLARIS11_M(asic_id.hw_internal_rev) ||
+                               ASIC_REV_IS_POLARIS12_V(asic_id.hw_internal_rev)) {
                        dc_version = DCE_VERSION_11_2;
                }
                break;

diff --git a/drivers/gpu/drm/amd/display/dc/dce112/dce112_resource.c b/drivers/gpu/drm/amd/display/dc/dce112/dce112_resource.c
index 3a47830..85d8b31 100644 (file)
--- a/drivers/gpu/drm/amd/display/dc/dce112/dce112_resource.c
+++ b/drivers/gpu/drm/amd/display/dc/dce112/dce112_resource.c
@@ -1233,7 +1233,8 @@ static void bw_calcs_data_update_from_pplib(struct core_dc *dc)
 const struct resource_caps *dce112_resource_cap(
        struct hw_asic_id *asic_id)
 {
-       if (ASIC_REV_IS_POLARIS11_M(asic_id->hw_internal_rev))
+       if (ASIC_REV_IS_POLARIS11_M(asic_id->hw_internal_rev) ||
+           ASIC_REV_IS_POLARIS12_V(asic_id->hw_internal_rev))
                return &polaris_11_resource_cap;
        else
                return &polaris_10_resource_cap;

diff --git a/drivers/gpu/drm/amd/display/include/dal_asic_id.h b/drivers/gpu/drm/amd/display/include/dal_asic_id.h
index 119297e..46f1e88 100644 (file)
--- a/drivers/gpu/drm/amd/display/include/dal_asic_id.h
+++ b/drivers/gpu/drm/amd/display/include/dal_asic_id.h
@@ -85,6 +85,7 @@
 /* DCE112 */
 #define VI_POLARIS10_P_A0 80
 #define VI_POLARIS11_M_A0 90
+#define VI_POLARIS12_V_A0 100
 
 #define VI_UNKNOWN 0xFF
 
@@ -95,7 +96,9 @@
 
 #define ASIC_REV_IS_POLARIS10_P(eChipRev) ((eChipRev >= VI_POLARIS10_P_A0) && \
                (eChipRev < VI_POLARIS11_M_A0))
-#define ASIC_REV_IS_POLARIS11_M(eChipRev) (eChipRev >= VI_POLARIS11_M_A0)
+#define ASIC_REV_IS_POLARIS11_M(eChipRev) ((eChipRev >= VI_POLARIS11_M_A0) &&  \
+               (eChipRev < VI_POLARIS12_V_A0))
+#define ASIC_REV_IS_POLARIS12_V(eChipRev) (eChipRev >= VI_POLARIS12_V_A0)
 
 /* DCE11 */
 #define CZ_CARRIZO_A0 0x01