S_030800_INSTANCE_BROADCAST_WRITES(1));
}
-void
-si_init_compute(struct radv_cmd_buffer *cmd_buffer)
+static void
+si_emit_compute(struct radv_physical_device *physical_device,
+ struct radeon_winsys_cs *cs)
{
- struct radv_physical_device *physical_device = cmd_buffer->device->physical_device;
- struct radeon_winsys_cs *cs = cmd_buffer->cs;
radeon_set_sh_reg_seq(cs, R_00B810_COMPUTE_START_X, 3);
radeon_emit(cs, 0);
radeon_emit(cs, 0);
}
}
-
-void si_init_config(struct radv_cmd_buffer *cmd_buffer)
+void
+si_init_compute(struct radv_cmd_buffer *cmd_buffer)
{
struct radv_physical_device *physical_device = cmd_buffer->device->physical_device;
+ si_emit_compute(physical_device, cmd_buffer->cs);
+}
+
+static void
+si_emit_config(struct radv_physical_device *physical_device,
+ struct radeon_winsys_cs *cs)
+{
unsigned num_rb = MIN2(physical_device->rad_info.num_render_backends, 16);
unsigned rb_mask = physical_device->rad_info.enabled_rb_mask;
unsigned raster_config, raster_config_1;
int i;
- struct radeon_winsys_cs *cs = cmd_buffer->cs;
+
radeon_emit(cs, PKT3(PKT3_CONTEXT_CONTROL, 1, 0));
radeon_emit(cs, CONTEXT_CONTROL_LOAD_ENABLE(1));
radeon_emit(cs, CONTEXT_CONTROL_SHADOW_ENABLE(1));
if (physical_device->rad_info.family == CHIP_STONEY)
radeon_set_context_reg(cs, R_028C40_PA_SC_SHADER_CONTROL, 0);
- si_init_compute(cmd_buffer);
+ si_emit_compute(physical_device, cs);
+}
+
+void si_init_config(struct radv_cmd_buffer *cmd_buffer)
+{
+ struct radv_physical_device *physical_device = cmd_buffer->device->physical_device;
+ si_emit_config(physical_device, cmd_buffer->cs);
}
static void