dt-bingings:reset: Add Starfive JH7110 reset bindings

Add bindings for the reset controller on the JH7110 RISC-V SoC by
StarFive Ltd.

Signed-off-by: samin <samin.guo@starfivetech.com>

diff --git a/Documentation/devicetree/bindings/reset/starfive,jh7110.yaml b/Documentation/devicetree/bindings/reset/starfive,jh7110.yaml
new file mode 100644 (file)
index 0000000..3ad6db0
--- /dev/null
+++ b/Documentation/devicetree/bindings/reset/starfive,jh7110.yaml
@@ -0,0 +1,40 @@
+# SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
+%YAML 1.2
+---
+$id: http://devicetree.org/schemas/reset/starfive,jh7110-reset.yaml#
+$schema: http://devicetree.org/meta-schemas/core.yaml#
+
+title: StarFive JH7110 SoC Reset Controller Device Tree Bindings
+
+maintainers:
+  - samin <samin.guo@starfivetech.com>
+
+properties:
+  compatible:
+    enum:
+      - starfive,jh7110-reset
+
+  reg:
+    maxItems: 3
+
+  "#reset-cells":
+    const: 1
+
+required:
+  - compatible
+  - reg
+  - "#reset-cells"
+
+additionalProperties: false
+
+examples:
+  - |
+    rstgen: reset-controller {
+        compatible = "starfive,jh7110-reset";
+        reg = <0x0 0x13020000 0x0 0x10000>,
+              <0x0 0x10230000 0x0 0x10000>,
+              <0x0 0x17000000 0x0 0x10000>;
+        reg-names = "syscrg", "stgcrg", "aoncrg";
+        #reset-cells = <1>;
+    };
+...

diff --git a/arch/riscv/boot/dts/starfive/starfive_jh7110.dts b/arch/riscv/boot/dts/starfive/starfive_jh7110.dts
index 198e0e1..906d13e 100644 (file)
--- a/arch/riscv/boot/dts/starfive/starfive_jh7110.dts
+++ b/arch/riscv/boot/dts/starfive/starfive_jh7110.dts
@@ -1,5 +1,6 @@
 // SPDX-License-Identifier: (GPL-2.0 OR MIT)
 /dts-v1/;
+#include <dt-bindings/reset/starfive-jh7110.h>
 #include "starfive_jh7110_clk.dtsi"
 
 / {
@@ -565,10 +566,14 @@
                        clock-names = "vcodec";
                        reg-names = "control";
                };
-               rst: reset-controller {
+               rstgen: reset-controller {
                        compatible = "starfive,jh7110-reset";
+                       reg = <0x0 0x13020000 0x0 0x10000>,
+                               <0x0 0x10230000 0x0 0x10000>,
+                               <0x0 0x17000000 0x0 0x10000>;
+                       reg-names = "syscrg", "stgcrg", "aoncrg";
                        #reset-cells = <1>;
-                       reset-controller;
+                       status = "okay";
                };
 
                /*gmac device configuration*/