emmc: g12a: optimize sd_uart for revA.
authorNan Li <nan.li@amlogic.com>
Tue, 24 Jul 2018 05:30:13 +0000 (13:30 +0800)
committerNan Li <nan.li@amlogic.com>
Thu, 26 Jul 2018 02:20:05 +0000 (19:20 -0700)
PD#170542: optimize sd_uart dts /sd1 for g12a revA.

Change-Id: I35bbb52790a1a11cc1d95d02c6cda717f43c9f75
Signed-off-by: Nan Li <nan.li@amlogic.com>
arch/arm64/boot/dts/amlogic/mesong12a.dtsi

index 2da80f4..2b1e033 100644 (file)
                interrupts = <0 190 1>;
 
                pinctrl-names = "sd_all_pins",
-                       "sd_clk_cmd_pins";
+                       "sd_clk_cmd_pins",
+                       "sd_1bit_pins",
+                       "sd_clk_cmd_uart_pins",
+                       "sd_1bit_uart_pins",
+                       "sd_to_ao_uart_pins",
+                       "ao_to_sd_uart_pins",
+                       "sd_to_ao_jtag_pins",
+                       "ao_to_sd_jtag_pins";
+
                pinctrl-0 = <&sd_all_pins>;
                pinctrl-1 = <&sd_clk_cmd_pins>;
+               pinctrl-2 = <&sd_1bit_pins>;
+               pinctrl-3 = <&sd_to_ao_uart_clr_pins
+                       &sd_clk_cmd_pins &ao_to_sd_uart_pins>;
+               pinctrl-4 = <&sd_to_ao_uart_clr_pins
+                       &sd_1bit_pins &ao_to_sd_uart_pins>;
+               pinctrl-5 = <&sd_all_pins &sd_to_ao_uart_pins>;
+               pinctrl-6 = <&sd_to_ao_uart_clr_pins
+                       &ao_to_sd_uart_pins>;
+               pinctrl-7 = <&sd_all_pins &sd_to_ao_uart_pins>;
+               pinctrl-8 = <&sd_to_ao_uart_clr_pins
+                       &ao_to_sd_uart_pins>;
 
                clocks = <&clkc CLKID_SD_EMMC_B>,
                        <&clkc CLKID_SD_EMMC_B_P0_COMP>,