radv: initialize stage/next_stage earlier

This will allow more refactoring.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24313>

diff --git a/src/amd/vulkan/radv_pipeline_compute.c b/src/amd/vulkan/radv_pipeline_compute.c
index 19a3f05..56e793b 100644 (file)
--- a/src/amd/vulkan/radv_pipeline_compute.c
+++ b/src/amd/vulkan/radv_pipeline_compute.c
@@ -150,9 +150,9 @@ radv_compile_cs(struct radv_device *device, struct vk_pipeline_cache *cache, str
    nir_shader_gather_info(cs_stage->nir, nir_shader_get_entrypoint(cs_stage->nir));
 
    /* Run the shader info pass. */
-   radv_nir_shader_info_init(&cs_stage->info);
-   radv_nir_shader_info_pass(device, cs_stage->nir, MESA_SHADER_NONE, pipeline_layout, pipeline_key,
-                             RADV_PIPELINE_COMPUTE, false, &cs_stage->info);
+   radv_nir_shader_info_init(cs_stage->stage, MESA_SHADER_NONE, &cs_stage->info);
+   radv_nir_shader_info_pass(device, cs_stage->nir, pipeline_layout, pipeline_key, RADV_PIPELINE_COMPUTE, false,
+                             &cs_stage->info);
 
    radv_declare_shader_args(device, pipeline_key, &cs_stage->info, MESA_SHADER_COMPUTE, MESA_SHADER_NONE,
                             &cs_stage->args);

diff --git a/src/amd/vulkan/radv_pipeline_graphics.c b/src/amd/vulkan/radv_pipeline_graphics.c
index 0690146..c8c48f0 100644 (file)
--- a/src/amd/vulkan/radv_pipeline_graphics.c
+++ b/src/amd/vulkan/radv_pipeline_graphics.c
@@ -2116,9 +2116,7 @@ radv_fill_shader_info(struct radv_device *device, struct radv_graphics_pipeline
 
    radv_foreach_stage(i, active_nir_stages)
    {
-      gl_shader_stage next_stage = radv_get_next_stage(i, active_nir_stages);
-
-      radv_nir_shader_info_pass(device, stages[i].nir, next_stage, pipeline_layout, pipeline_key, pipeline->base.type,
+      radv_nir_shader_info_pass(device, stages[i].nir, pipeline_layout, pipeline_key, pipeline->base.type,
                                 i == pipeline->last_vgt_api_stage && consider_force_vrs, &stages[i].info);
    }
 
@@ -2192,9 +2190,9 @@ radv_create_gs_copy_shader(struct radv_device *device, struct vk_pipeline_cache
       .stage = MESA_SHADER_VERTEX,
       .shader_sha1 = {0},
    };
-   radv_nir_shader_info_init(&gs_copy_stage.info);
-   radv_nir_shader_info_pass(device, nir, MESA_SHADER_FRAGMENT, pipeline_layout, pipeline_key, RADV_PIPELINE_GRAPHICS,
-                             false, &gs_copy_stage.info);
+   radv_nir_shader_info_init(gs_copy_stage.stage, MESA_SHADER_FRAGMENT, &gs_copy_stage.info);
+   radv_nir_shader_info_pass(device, nir, pipeline_layout, pipeline_key, RADV_PIPELINE_GRAPHICS, false,
+                             &gs_copy_stage.info);
    gs_copy_stage.info.wave_size = 64;      /* Wave32 not supported. */
    gs_copy_stage.info.workgroup_size = 64; /* HW VS: separate waves, no workgroups */
    gs_copy_stage.info.so = gs_info->so;
@@ -2603,7 +2601,9 @@ radv_graphics_pipeline_compile(struct radv_graphics_pipeline *pipeline, const Vk
 
    radv_foreach_stage(i, active_nir_stages)
    {
-      radv_nir_shader_info_init(&stages[i].info);
+      gl_shader_stage next_stage = radv_get_next_stage(i, active_nir_stages);
+
+      radv_nir_shader_info_init(i, next_stage, &stages[i].info);
    }
 
    /* Determine if shaders uses NGG before linking because it's needed for some NIR pass. */

diff --git a/src/amd/vulkan/radv_pipeline_rt.c b/src/amd/vulkan/radv_pipeline_rt.c
index 0d5f6ad..82d1a95 100644 (file)
--- a/src/amd/vulkan/radv_pipeline_rt.c
+++ b/src/amd/vulkan/radv_pipeline_rt.c
@@ -352,9 +352,9 @@ radv_rt_nir_to_asm(struct radv_device *device, struct vk_pipeline_cache *cache,
 
    /* Gather shader info. */
    nir_shader_gather_info(stage->nir, nir_shader_get_entrypoint(stage->nir));
-   radv_nir_shader_info_init(&stage->info);
-   radv_nir_shader_info_pass(device, stage->nir, MESA_SHADER_NONE, pipeline_layout, pipeline_key,
-                             RADV_PIPELINE_RAY_TRACING, false, &stage->info);
+   radv_nir_shader_info_init(stage->stage, MESA_SHADER_NONE, &stage->info);
+   radv_nir_shader_info_pass(device, stage->nir, pipeline_layout, pipeline_key, RADV_PIPELINE_RAY_TRACING, false,
+                             &stage->info);
 
    /* Declare shader arguments. */
    radv_declare_shader_args(device, pipeline_key, &stage->info, stage->stage, MESA_SHADER_NONE, &stage->args);

diff --git a/src/amd/vulkan/radv_private.h b/src/amd/vulkan/radv_private.h
index 4a3ed05..f818890 100644 (file)
--- a/src/amd/vulkan/radv_private.h
+++ b/src/amd/vulkan/radv_private.h
@@ -3028,12 +3028,12 @@ void llvm_compile_shader(const struct radv_nir_compiler_options *options, const
 /* radv_shader_info.h */
 struct radv_shader_info;
 
-void radv_nir_shader_info_pass(struct radv_device *device, const struct nir_shader *nir, gl_shader_stage next_stage,
+void radv_nir_shader_info_pass(struct radv_device *device, const struct nir_shader *nir,
                                const struct radv_pipeline_layout *layout, const struct radv_pipeline_key *pipeline_key,
                                const enum radv_pipeline_type pipeline_type, bool consider_force_vrs,
                                struct radv_shader_info *info);
 
-void radv_nir_shader_info_init(struct radv_shader_info *info);
+void radv_nir_shader_info_init(gl_shader_stage stage, gl_shader_stage next_stage, struct radv_shader_info *info);
 
 void radv_nir_shader_info_link(struct radv_device *device, const struct radv_pipeline_key *pipeline_key,
                                struct radv_pipeline_stage *stages);

diff --git a/src/amd/vulkan/radv_shader_info.c b/src/amd/vulkan/radv_shader_info.c
index e443cae..986d087 100644 (file)
--- a/src/amd/vulkan/radv_shader_info.c
+++ b/src/amd/vulkan/radv_shader_info.c
@@ -847,23 +847,23 @@ radv_get_user_data_0(const struct radv_device *device, struct radv_shader_info *
 }
 
 void
-radv_nir_shader_info_init(struct radv_shader_info *info)
+radv_nir_shader_info_init(gl_shader_stage stage, gl_shader_stage next_stage, struct radv_shader_info *info)
 {
    memset(info, 0, sizeof(*info));
 
    /* Assume that shaders can inline all push constants by default. */
    info->can_inline_all_push_constants = true;
+
+   info->stage = stage;
+   info->next_stage = next_stage;
 }
 
 void
-radv_nir_shader_info_pass(struct radv_device *device, const struct nir_shader *nir, gl_shader_stage next_stage,
+radv_nir_shader_info_pass(struct radv_device *device, const struct nir_shader *nir,
                           const struct radv_pipeline_layout *layout, const struct radv_pipeline_key *pipeline_key,
                           const enum radv_pipeline_type pipeline_type, bool consider_force_vrs,
                           struct radv_shader_info *info)
 {
-   info->stage = nir->info.stage;
-   info->next_stage = next_stage;
-
    struct nir_function *func = (struct nir_function *)exec_list_get_head_const(&nir->functions);
 
    if (layout && layout->dynamic_offset_count &&