drm/msm/dpu: remove pipe_qos_cfg from struct dpu_plane
authorDmitry Baryshkov <dmitry.baryshkov@linaro.org>
Thu, 30 Sep 2021 13:59:53 +0000 (16:59 +0300)
committerRob Clark <robdclark@chromium.org>
Sun, 28 Nov 2021 17:32:01 +0000 (09:32 -0800)
The pipe_qos_cfg is used only in _dpu_plane_set_qos_ctrl(), so remove it
from the dpu_plane struct and allocate it on stack when necessary.

Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Reviewed-by: Abhinav Kumar <abhinavk@codeaurora.org>
Link: https://lore.kernel.org/r/20210930140002.308628-3-dmitry.baryshkov@linaro.org
Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Signed-off-by: Rob Clark <robdclark@chromium.org>
drivers/gpu/drm/msm/disp/dpu1/dpu_plane.c

index b6f67f3..4ae3b72 100644 (file)
@@ -105,7 +105,6 @@ struct dpu_plane {
 
        struct dpu_hw_pipe *pipe_hw;
        struct dpu_hw_pipe_cfg pipe_cfg;
-       struct dpu_hw_pipe_qos_cfg pipe_qos_cfg;
        uint32_t color_fill;
        bool is_error;
        bool is_rt_pipe;
@@ -422,38 +421,41 @@ static void _dpu_plane_set_qos_ctrl(struct drm_plane *plane,
        bool enable, u32 flags)
 {
        struct dpu_plane *pdpu = to_dpu_plane(plane);
+       struct dpu_hw_pipe_qos_cfg pipe_qos_cfg;
+
+       memset(&pipe_qos_cfg, 0, sizeof(pipe_qos_cfg));
 
        if (flags & DPU_PLANE_QOS_VBLANK_CTRL) {
-               pdpu->pipe_qos_cfg.creq_vblank = pdpu->pipe_sblk->creq_vblank;
-               pdpu->pipe_qos_cfg.danger_vblank =
+               pipe_qos_cfg.creq_vblank = pdpu->pipe_sblk->creq_vblank;
+               pipe_qos_cfg.danger_vblank =
                                pdpu->pipe_sblk->danger_vblank;
-               pdpu->pipe_qos_cfg.vblank_en = enable;
+               pipe_qos_cfg.vblank_en = enable;
        }
 
        if (flags & DPU_PLANE_QOS_VBLANK_AMORTIZE) {
                /* this feature overrules previous VBLANK_CTRL */
-               pdpu->pipe_qos_cfg.vblank_en = false;
-               pdpu->pipe_qos_cfg.creq_vblank = 0; /* clear vblank bits */
+               pipe_qos_cfg.vblank_en = false;
+               pipe_qos_cfg.creq_vblank = 0; /* clear vblank bits */
        }
 
        if (flags & DPU_PLANE_QOS_PANIC_CTRL)
-               pdpu->pipe_qos_cfg.danger_safe_en = enable;
+               pipe_qos_cfg.danger_safe_en = enable;
 
        if (!pdpu->is_rt_pipe) {
-               pdpu->pipe_qos_cfg.vblank_en = false;
-               pdpu->pipe_qos_cfg.danger_safe_en = false;
+               pipe_qos_cfg.vblank_en = false;
+               pipe_qos_cfg.danger_safe_en = false;
        }
 
        DPU_DEBUG_PLANE(pdpu, "pnum:%d ds:%d vb:%d pri[0x%x, 0x%x] is_rt:%d\n",
                pdpu->pipe - SSPP_VIG0,
-               pdpu->pipe_qos_cfg.danger_safe_en,
-               pdpu->pipe_qos_cfg.vblank_en,
-               pdpu->pipe_qos_cfg.creq_vblank,
-               pdpu->pipe_qos_cfg.danger_vblank,
+               pipe_qos_cfg.danger_safe_en,
+               pipe_qos_cfg.vblank_en,
+               pipe_qos_cfg.creq_vblank,
+               pipe_qos_cfg.danger_vblank,
                pdpu->is_rt_pipe);
 
        pdpu->pipe_hw->ops.setup_qos_ctrl(pdpu->pipe_hw,
-                       &pdpu->pipe_qos_cfg);
+                       &pipe_qos_cfg);
 }
 
 /**