MIPS: BMIPS: Add support SDHCI device nodes
authorJaedon Shin <jaedon.shin@gmail.com>
Fri, 19 Aug 2016 02:52:28 +0000 (11:52 +0900)
committerRalf Baechle <ralf@linux-mips.org>
Thu, 6 Oct 2016 15:31:02 +0000 (17:31 +0200)
Adds SDHCI device nodes to BCM7xxx MIPS based SoCs.

Signed-off-by: Jaedon Shin <jaedon.shin@gmail.com>
Reviewed-by: Florian Fainelli <f.fainelli@gmail.com>
Cc: Jonas Gorski <jonas.gorski@gmail.com>
Cc: Kevin Cernekee <cernekee@gmail.com>
Cc: Rob Herring <robh+dt@kernel.org>
Cc: MIPS Mailing List <linux-mips@linux-mips.org>
Cc: devicetree@vger.kernel.org
Patchwork: https://patchwork.linux-mips.org/patch/14002/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
arch/mips/boot/dts/brcm/bcm7346.dtsi
arch/mips/boot/dts/brcm/bcm7360.dtsi
arch/mips/boot/dts/brcm/bcm7362.dtsi
arch/mips/boot/dts/brcm/bcm7425.dtsi
arch/mips/boot/dts/brcm/bcm7435.dtsi
arch/mips/boot/dts/brcm/bcm97346dbsmb.dts
arch/mips/boot/dts/brcm/bcm97360svmb.dts
arch/mips/boot/dts/brcm/bcm97362svmb.dts
arch/mips/boot/dts/brcm/bcm97425svmb.dts
arch/mips/boot/dts/brcm/bcm97435svmb.dts

index 0105e4e..0da4f8a 100644 (file)
                                #phy-cells = <0>;
                        };
                };
+
+               sdhci0: sdhci@413500 {
+                       compatible = "brcm,bcm7425-sdhci";
+                       reg = <0x413500 0x100>;
+                       interrupt-parent = <&periph_intc>;
+                       interrupts = <85>;
+                       status = "disabled";
+               };
        };
 };
index f0f63cb..9f72d34 100644 (file)
                                #phy-cells = <0>;
                        };
                };
+
+               sdhci0: sdhci@410000 {
+                       compatible = "brcm,bcm7425-sdhci";
+                       reg = <0x410000 0x100>;
+                       interrupt-parent = <&periph_intc>;
+                       interrupts = <82>;
+                       status = "disabled";
+               };
        };
 };
index ac42b98..ff734f4 100644 (file)
                                #phy-cells = <0>;
                        };
                };
+
+               sdhci0: sdhci@410000 {
+                       compatible = "brcm,bcm7425-sdhci";
+                       reg = <0x410000 0x100>;
+                       interrupt-parent = <&periph_intc>;
+                       interrupts = <82>;
+                       status = "disabled";
+               };
        };
 };
index 8b05b98..1c8d3b4 100644 (file)
                                #phy-cells = <0>;
                        };
                };
+
+               sdhci0: sdhci@419000 {
+                       compatible = "brcm,bcm7425-sdhci";
+                       reg = <0x419000 0x100>;
+                       interrupt-parent = <&periph_intc>;
+                       interrupts = <43>;
+                       sd-uhs-sdr50;
+                       mmc-hs200-1_8v;
+                       status = "disabled";
+               };
+
+               sdhci1: sdhci@419200 {
+                       compatible = "brcm,bcm7425-sdhci";
+                       reg = <0x419200 0x100>;
+                       interrupt-parent = <&periph_intc>;
+                       interrupts = <44>;
+                       sd-uhs-sdr50;
+                       mmc-hs200-1_8v;
+                       status = "disabled";
+               };
        };
 };
index b7bb102..2b28d91 100644 (file)
                                #phy-cells = <0>;
                        };
                };
+
+               sdhci0: sdhci@41a000 {
+                       compatible = "brcm,bcm7425-sdhci";
+                       reg = <0x41a000 0x100>;
+                       interrupt-parent = <&periph_intc>;
+                       interrupts = <47>;
+                       sd-uhs-sdr50;
+                       mmc-hs200-1_8v;
+                       status = "disabled";
+               };
+
+               sdhci1: sdhci@41a200 {
+                       compatible = "brcm,bcm7425-sdhci";
+                       reg = <0x41a200 0x100>;
+                       interrupt-parent = <&periph_intc>;
+                       interrupts = <48>;
+                       sd-uhs-sdr50;
+                       mmc-hs200-1_8v;
+                       status = "disabled";
+               };
        };
 };
index 2c55ab0..27c9f12 100644 (file)
 &sata_phy {
        status = "okay";
 };
+
+&sdhci0 {
+       status = "okay";
+};
index 496e6ed..bed821b 100644 (file)
@@ -68,3 +68,7 @@
 &sata_phy {
        status = "okay";
 };
+
+&sdhci0 {
+       status = "okay";
+};
index b880c01..1b9bc4b 100644 (file)
@@ -64,3 +64,7 @@
 &sata_phy {
        status = "okay";
 };
+
+&sdhci0 {
+       status = "okay";
+};
index f091e91..1c6b74d 100644 (file)
 &ohci3 {
        status = "okay";
 };
+
+&sdhci0 {
+       status = "okay";
+};
+
+&sdhci1 {
+       status = "okay";
+};
index 9db84f2..64bb198 100644 (file)
 &sata_phy {
        status = "okay";
 };
+
+&sdhci0 {
+       status = "okay";
+};
+
+&sdhci1 {
+       status = "okay";
+};