# amd issue #6305
KHR-GL46.shader_ballot_tests.ShaderBallotFunctionRead,Fail
-# RADV regression #6597
-dEQP-GLES31.functional.stencil_texturing.render.depth24_stencil8_clear,Fail
-dEQP-GLES31.functional.stencil_texturing.render.depth32f_stencil8_clear,Fail
-dEQP-GLES31.functional.texture.texture_buffer.render_modify.as_index_array_as_fragment_texture.bufferdata,Fail
-dEQP-GLES31.functional.texture.texture_buffer.render_modify.as_index_array_as_vertex_texture_as_fragment_texture.bufferdata,Fail
-dEQP-GLES31.functional.texture.texture_buffer.render_modify.as_vertex_array_as_fragment_texture.bufferdata,Fail
-dEQP-GLES31.functional.texture.texture_buffer.render_modify.as_vertex_array_as_fragment_texture.buffersubdata,Fail
-dEQP-GLES31.functional.texture.texture_buffer.render_modify.as_vertex_array_as_index_array_as_fragment_texture.bufferdata,Fail
-dEQP-GLES31.functional.texture.texture_buffer.render_modify.as_vertex_array_as_index_array_as_vertex_texture_as_fragment_texture.bufferdata,Fail
-dEQP-GLES31.functional.texture.texture_buffer.render_modify.as_vertex_array_as_vertex_texture_as_fragment_texture.bufferdata,Fail
-dEQP-GLES31.functional.texture.texture_buffer.render_modify.as_vertex_array_as_vertex_texture_as_fragment_texture.buffersubdata,Fail
-dEQP-GLES31.functional.texture.texture_buffer.render_modify.as_vertex_texture_as_fragment_texture.bufferdata,Fail
-dEQP-GLES31.functional.texture.texture_buffer.render_modify.as_vertex_texture_as_fragment_texture.buffersubdata,Fail
-
-
dEQP-GLES2.functional.clipping.line.wide_line_clip_viewport_center,Fail
dEQP-GLES2.functional.clipping.line.wide_line_clip_viewport_corner,Fail
dEQP-GLES2.functional.clipping.point.wide_point_clip,Fail
ctx->gfx_stages[PIPE_SHADER_FRAGMENT]->nir->info.outputs_written : 0;
bool needs_write_z = (ctx->dsa_state && ctx->dsa_state->hw_state.depth_write) ||
outputs_written & BITFIELD64_BIT(FRAG_RESULT_DEPTH);
- needs_write_z |= transient || rt->clear_color;
+ needs_write_z |= transient || rt->clear_color ||
+ (zink_fb_clear_enabled(ctx, PIPE_MAX_COLOR_BUFS) && (zink_fb_clear_element(fb_clear, 0)->zs.bits & PIPE_CLEAR_DEPTH));
- bool needs_write_s = rt->clear_stencil || outputs_written & BITFIELD64_BIT(FRAG_RESULT_STENCIL);
+ bool needs_write_s = rt->clear_stencil || (outputs_written & BITFIELD64_BIT(FRAG_RESULT_STENCIL)) ||
+ (zink_fb_clear_enabled(ctx, PIPE_MAX_COLOR_BUFS) && (zink_fb_clear_element(fb_clear, 0)->zs.bits & PIPE_CLEAR_STENCIL));
if (!needs_write_z && (!ctx->dsa_state || !ctx->dsa_state->base.depth_enabled))
/* depth sample, stencil write */
rt->mixed_zs = needs_write_s && zsbuf->bind_count[0];