arm: dts: Update cache properties for broadcom
authorPierre Gondois <pierre.gondois@arm.com>
Tue, 22 Nov 2022 16:32:06 +0000 (17:32 +0100)
committerFlorian Fainelli <f.fainelli@gmail.com>
Mon, 28 Nov 2022 23:37:14 +0000 (15:37 -0800)
The DeviceTree Specification v0.3 specifies that the cache node
'compatible' and 'cache-level' properties are 'required'. Cf.
s3.8 Multi-level and Shared Cache Nodes
The 'cache-unified' property should be present if one of the
properties for unified cache is present ('cache-size', ...).

Update the Device Trees accordingly.

Signed-off-by: Pierre Gondois <pierre.gondois@arm.com>
Link: https://lore.kernel.org/r/20221122163208.3810985-2-pierre.gondois@arm.com
Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
arch/arm/boot/dts/bcm2711.dtsi
arch/arm/boot/dts/bcm2836.dtsi
arch/arm/boot/dts/bcm2837.dtsi
arch/arm/boot/dts/bcm47622.dtsi
arch/arm/boot/dts/bcm63148.dtsi
arch/arm/boot/dts/bcm63178.dtsi
arch/arm/boot/dts/bcm6756.dtsi
arch/arm/boot/dts/bcm6846.dtsi
arch/arm/boot/dts/bcm6855.dtsi
arch/arm/boot/dts/bcm6878.dtsi

index 0f65a81..097e9f2 100644 (file)
                 */
                l2: l2-cache0 {
                        compatible = "cache";
+                       cache-unified;
                        cache-size = <0x100000>;
                        cache-line-size = <64>;
                        cache-sets = <1024>; // 1MiB(size)/64(line-size)=16384ways/16-way set
index 50aee66..783fe62 100644 (file)
                 */
                l2: l2-cache0 {
                        compatible = "cache";
+                       cache-unified;
                        cache-size = <0x80000>;
                        cache-line-size = <64>;
                        cache-sets = <1024>; // 512KiB(size)/64(line-size)=8192ways/8-way set
index 58b3efe..84c08b4 100644 (file)
                 */
                l2: l2-cache0 {
                        compatible = "cache";
+                       cache-unified;
                        cache-size = <0x80000>;
                        cache-line-size = <64>;
                        cache-sets = <512>; // 512KiB(size)/64(line-size)=8192ways/16-way set
index 2df0452..f4b2db9 100644 (file)
@@ -51,6 +51,7 @@
 
                L2_0: l2-cache0 {
                        compatible = "cache";
+                       cache-level = <2>;
                };
        };
 
index df5307b..7cd55d6 100644 (file)
@@ -35,6 +35,7 @@
 
                L2_0: l2-cache0 {
                        compatible = "cache";
+                       cache-level = <2>;
                };
        };
 
index cbd094d..043e699 100644 (file)
@@ -43,6 +43,7 @@
 
                L2_0: l2-cache0 {
                        compatible = "cache";
+                       cache-level = <2>;
                };
        };
 
index ce1b59f..5c72219 100644 (file)
@@ -51,6 +51,7 @@
 
                L2_0: l2-cache0 {
                        compatible = "cache";
+                       cache-level = <2>;
                };
        };
 
index 8aa47a2..81513a7 100644 (file)
@@ -35,6 +35,7 @@
 
                L2_0: l2-cache0 {
                        compatible = "cache";
+                       cache-level = <2>;
                };
        };
 
index 620f51a..5fa5fea 100644 (file)
@@ -43,6 +43,7 @@
 
                L2_0: l2-cache0 {
                        compatible = "cache";
+                       cache-level = <2>;
                };
        };
 
index 1e8b5fa..4ec836a 100644 (file)
@@ -35,6 +35,7 @@
 
                L2_0: l2-cache0 {
                        compatible = "cache";
+                       cache-level = <2>;
                };
        };