Fix hardware intrinsc API XML comments (dotnet/coreclr#21515)
authorFei Peng <fei.peng@intel.com>
Thu, 13 Dec 2018 17:00:16 +0000 (09:00 -0800)
committerTanner Gooding <tagoo@outlook.com>
Thu, 13 Dec 2018 17:00:16 +0000 (09:00 -0800)
* Fix AVX2 and SSE2 XML comments

* Fix ARM intrinsic XML comments

Commit migrated from https://github.com/dotnet/coreclr/commit/fdef855fa1df3540ba632bfae850279d627bde66

src/libraries/System.Private.CoreLib/src/System/Runtime/Intrinsics/Arm/Arm64/Aes.PlatformNotSupported.cs
src/libraries/System.Private.CoreLib/src/System/Runtime/Intrinsics/Arm/Arm64/Aes.cs
src/libraries/System.Private.CoreLib/src/System/Runtime/Intrinsics/Arm/Arm64/Sha1.PlatformNotSupported.cs
src/libraries/System.Private.CoreLib/src/System/Runtime/Intrinsics/Arm/Arm64/Sha1.cs
src/libraries/System.Private.CoreLib/src/System/Runtime/Intrinsics/Arm/Arm64/Sha256.PlatformNotSupported.cs
src/libraries/System.Private.CoreLib/src/System/Runtime/Intrinsics/Arm/Arm64/Sha256.cs
src/libraries/System.Private.CoreLib/src/System/Runtime/Intrinsics/Arm/Arm64/Simd.cs
src/libraries/System.Private.CoreLib/src/System/Runtime/Intrinsics/X86/Avx2.PlatformNotSupported.cs
src/libraries/System.Private.CoreLib/src/System/Runtime/Intrinsics/X86/Sse2.PlatformNotSupported.cs

index ed73e7e..7451b4b 100644 (file)
@@ -16,25 +16,25 @@ namespace System.Runtime.Intrinsics.Arm.Arm64
         /// <summary>
         /// Performs AES single round decryption
         /// vaesdq_u8 (uint8x16_t data, uint8x16_t key)
-        ///</summary>
+        /// </summary>
         public static Vector128<byte> Decrypt(Vector128<byte> value, Vector128<byte> roundKey) { throw new PlatformNotSupportedException(); }
 
         /// <summary>
         /// Performs AES single round encryption
         /// vaeseq_u8 (uint8x16_t data, uint8x16_t key)
-        ///</summary>
+        /// </summary>
         public static Vector128<byte> Encrypt(Vector128<byte> value, Vector128<byte> roundKey) { throw new PlatformNotSupportedException(); }
 
         /// <summary>
         /// Performs AES  Mix Columns
         /// vaesmcq_u8 (uint8x16_t data)
-        ///</summary>
+        /// </summary>
         public static Vector128<byte> MixColumns(Vector128<byte> value) { throw new PlatformNotSupportedException(); }
 
         /// <summary>
         /// Performs AES inverse mix columns
         /// vaesimcq_u8  (uint8x16_t data)
-        ///</summary>
+        /// </summary>
         public static Vector128<byte> InverseMixColumns(Vector128<byte> value) { throw new PlatformNotSupportedException(); }
     }
 }
index 24c9342..8a04478 100644 (file)
@@ -13,28 +13,28 @@ namespace System.Runtime.Intrinsics.Arm.Arm64
     public static class Aes
     {
         public static bool IsSupported { get => IsSupported; }
-        // <summary>
+        /// <summary>
         /// Performs AES single round decryption
         /// vaesdq_u8 (uint8x16_t data, uint8x16_t key)
-        ///</summary>
+        /// </summary>
         public static Vector128<byte> Decrypt(Vector128<byte> value, Vector128<byte> roundKey) => Decrypt(value, roundKey);
 
-        // <summary>
+        /// <summary>
         /// Performs AES single round encryption
         /// vaeseq_u8 (uint8x16_t data, uint8x16_t key)
-        ///</summary>
+        /// </summary>
         public static Vector128<byte> Encrypt(Vector128<byte> value, Vector128<byte> roundKey) => Encrypt(value, roundKey);
 
-        // <summary>
+        /// <summary>
         /// Performs AES  Mix Columns
         /// vaesmcq_u8 (uint8x16_t data)
-        ///</summary>
+        /// </summary>
         public static Vector128<byte> MixColumns(Vector128<byte> value) => MixColumns(value);
 
-        // <summary>
+        /// <summary>
         /// Performs AES inverse mix columns
         /// vaesimcq_u8  (uint8x16_t data)
-        ///</summary>
+        /// </summary>
         public static Vector128<byte> InverseMixColumns(Vector128<byte> value) => InverseMixColumns(value);
     }
 }
index f44d281..ece7e44 100644 (file)
@@ -18,37 +18,37 @@ namespace System.Runtime.Intrinsics.Arm.Arm64
         /// <summary>
         /// Performs SHA1 hash update choose form.
         /// vsha1cq_u32 (uint32x4_t hash_abcd, uint32_t hash_e, uint32x4_t wk)
-        ///</summary>
+        /// </summary>
         public static Vector128<uint> HashChoose(Vector128<uint> hash_abcd, uint hash_e, Vector128<uint>wk) { throw new PlatformNotSupportedException(); }
 
         /// <summary>
         /// Performs SHA1 hash update majority form.
         /// vsha1mq_u32 (uint32x4_t hash_abcd, uint32_t hash_e, uint32x4_t wk)
-        ///</summary>
+        /// </summary>
         public static Vector128<uint> HashMajority(Vector128<uint> hash_abcd, uint hash_e, Vector128<uint>wk) { throw new PlatformNotSupportedException(); }
 
         /// <summary>
         /// Performs SHA1 hash update parity form.
         /// vsha1pq_u32 (uint32x4_t hash_abcd, uint32_t hash_e, uint32x4_t wk)
-        ///</summary>
+        /// </summary>
         public static Vector128<uint> HashParity(Vector128<uint> hash_abcd, uint hash_e, Vector128<uint>wk) { throw new PlatformNotSupportedException(); }
 
         /// <summary>
         /// Performs SHA1 fixed rotate
         /// vsha1h_u32 (uint32_t hash_e)
-        ///</summary>
+        /// </summary>
         public static uint FixedRotate(uint hash_e) { throw new PlatformNotSupportedException(); }
 
         /// <summary>
         /// Performs SHA1 schedule update 0
         /// vsha1su0q_u32 (uint32x4_t w0_3, uint32x4_t w4_7, uint32x4_t w8_11)
-        ///</summary>
+        /// </summary>
         public static Vector128<uint> SchedulePart1(Vector128<uint> w0_3, Vector128<uint> w4_7, Vector128<uint> w8_11) { throw new PlatformNotSupportedException(); }
 
         /// <summary>
         /// Performs SHA1 schedule update 1
         /// vsha1su1q_u32 (uint32x4_t tw0_3, uint32x4_t w12_15)
-        ///</summary>
+        /// </summary>
         public static Vector128<uint> SchedulePart2(Vector128<uint> tw0_3, Vector128<uint> w12_15) { throw new PlatformNotSupportedException(); }
     }
 }
index 28cc397..fe90478 100644 (file)
@@ -14,40 +14,40 @@ namespace System.Runtime.Intrinsics.Arm.Arm64
     {
         public static bool IsSupported {  get => IsSupported; }
 
-        // <summary>
+        /// <summary>
         /// Performs SHA1 hash update choose form.
         /// vsha1cq_u32 (uint32x4_t hash_abcd, uint32_t hash_e, uint32x4_t wk)
-        ///</summary>
+        /// </summary>
         public static Vector128<uint> HashChoose(Vector128<uint> hash_abcd, uint hash_e, Vector128<uint>wk) => HashChoose(hash_abcd, hash_e, wk);
 
-        // <summary>
+        /// <summary>
         /// Performs SHA1 hash update majority form.
         /// vsha1mq_u32 (uint32x4_t hash_abcd, uint32_t hash_e, uint32x4_t wk)
-        ///</summary>
+        /// </summary>
         public static Vector128<uint> HashMajority(Vector128<uint> hash_abcd, uint hash_e, Vector128<uint>wk) => HashMajority(hash_abcd, hash_e, wk);
 
-        // <summary>
+        /// <summary>
         /// Performs SHA1 hash update parity form.
         /// vsha1pq_u32 (uint32x4_t hash_abcd, uint32_t hash_e, uint32x4_t wk)
-        ///</summary>
+        /// </summary>
         public static Vector128<uint> HashParity(Vector128<uint> hash_abcd, uint hash_e, Vector128<uint>wk) => HashParity(hash_abcd, hash_e, wk);
 
-        // <summary>
+        /// <summary>
         /// Performs SHA1 fixed rotate
         /// vsha1h_u32 (uint32_t hash_e)
-        ///</summary>
+        /// </summary>
         public static uint FixedRotate(uint hash_e) => FixedRotate(hash_e);
 
-        // <summary>
+        /// <summary>
         /// Performs SHA1 schedule update 0
         /// vsha1su0q_u32 (uint32x4_t w0_3, uint32x4_t w4_7, uint32x4_t w8_11)
-        ///</summary>
+        /// </summary>
         public static Vector128<uint> SchedulePart1(Vector128<uint> w0_3, Vector128<uint> w4_7, Vector128<uint> w8_11) => SchedulePart1(w0_3, w4_7, w8_11);
 
-        // <summary>
+        /// <summary>
         /// Performs SHA1 schedule update 1
         /// vsha1su1q_u32 (uint32x4_t tw0_3, uint32x4_t w12_15)
-        ///</summary>
+        /// </summary>
         public static Vector128<uint> SchedulePart2(Vector128<uint> tw0_3, Vector128<uint> w12_15)  => SchedulePart2(tw0_3, w12_15);
     }
 }
index 5aee77e..89d5f72 100644 (file)
@@ -17,25 +17,25 @@ namespace System.Runtime.Intrinsics.Arm.Arm64
         /// <summary>
         /// Performs SHA256 hash update (part 1).
         /// vsha256hq_u32 (uint32x4_t hash_abcd, uint32x4_t hash_efgh, uint32x4_t wk)
-        ///</summary>
+        /// </summary>
         public static Vector128<uint> HashLower(Vector128<uint> hash_abcd, Vector128<uint> hash_efgh, Vector128<uint> wk) { throw new PlatformNotSupportedException(); }
 
         /// <summary>
         /// Performs SHA256 hash update (part 2).
         /// vsha256h2q_u32 (uint32x4_t hash_efgh, uint32x4_t hash_abcd, uint32x4_t wk)
-        ///</summary>
+        /// </summary>
         public static Vector128<uint> HashUpper(Vector128<uint> hash_efgh, Vector128<uint> hash_abcd, Vector128<uint> wk) { throw new PlatformNotSupportedException(); }
 
         /// <summary>
         /// Performs SHA256 schedule update 0
         /// vsha256su0q_u32 (uint32x4_t w0_3, uint32x4_t w4_7)
-        ///</summary>
+        /// </summary>
         public static Vector128<uint> SchedulePart1(Vector128<uint> w0_3, Vector128<uint> w4_7) { throw new PlatformNotSupportedException(); }
 
         /// <summary>
         /// Performs SHA256 schedule update 1
         /// vsha256su1q_u32 (uint32x4_t w0_3, uint32x4_t w8_11, uint32x4_t w12_15)
-        ///</summary>
+        /// </summary>
         public static Vector128<uint> SchedulePart2(Vector128<uint> w0_3, Vector128<uint> w8_11, Vector128<uint> w12_15) { throw new PlatformNotSupportedException(); }
     }
 }
index 4e7e51d..bebacbc 100644 (file)
@@ -14,28 +14,28 @@ namespace System.Runtime.Intrinsics.Arm.Arm64
     {
         public static bool IsSupported { get => IsSupported; }
 
-        // <summary>
+        /// <summary>
         /// Performs SHA256 hash update (part 1).
         /// vsha256hq_u32 (uint32x4_t hash_abcd, uint32x4_t hash_efgh, uint32x4_t wk)
-        ///</summary>
+        /// </summary>
         public static Vector128<uint> HashLower(Vector128<uint> hash_abcd, Vector128<uint> hash_efgh, Vector128<uint> wk) => HashLower(hash_abcd, hash_efgh, wk);
 
-        // <summary>
+        /// <summary>
         /// Performs SHA256 hash update (part 2).
         /// vsha256h2q_u32 (uint32x4_t hash_efgh, uint32x4_t hash_abcd, uint32x4_t wk)
-        ///</summary>
+        /// </summary>
         public static Vector128<uint> HashUpper(Vector128<uint> hash_efgh, Vector128<uint> hash_abcd, Vector128<uint> wk) => HashUpper(hash_efgh, hash_abcd, wk);
 
-        // <summary>
+        /// <summary>
         /// Performs SHA256 schedule update 0
         /// vsha256su0q_u32 (uint32x4_t w0_3, uint32x4_t w4_7)
-        ///</summary>
+        /// </summary>
         public static Vector128<uint> SchedulePart1(Vector128<uint> w0_3, Vector128<uint> w4_7) => SchedulePart1(w0_3, w4_7);
 
-        // <summary>
+        /// <summary>
         /// Performs SHA256 schedule update 1
         /// vsha256su1q_u32 (uint32x4_t tw0_3, uint32x4_t w8_11, uint32x4_t w12_15)
-        ///</summary>
+        /// </summary>
         public static Vector128<uint> SchedulePart2(Vector128<uint> w0_3, Vector128<uint> w8_11, Vector128<uint> w12_15) => SchedulePart2(w0_3, w8_11, w12_15);
     }
 }
index f162483..c10c3ff 100644 (file)
@@ -21,7 +21,7 @@ namespace System.Runtime.Intrinsics.Arm.Arm64
 
         /// <summary>
         /// Vector abs
-        /// Corresponds to vector forms of ARM64 ABS & FABS
+        /// Corresponds to vector forms of ARM64 ABS &amp; FABS
         /// </summary>
         public static Vector64<byte>    Abs(Vector64<sbyte>   value) => Abs(value);
         public static Vector64<ushort>  Abs(Vector64<short>   value) => Abs(value);
@@ -36,7 +36,7 @@ namespace System.Runtime.Intrinsics.Arm.Arm64
 
         /// <summary>
         /// Vector add
-        /// Corresponds to vector forms of ARM64 ADD & FADD
+        /// Corresponds to vector forms of ARM64 ADD &amp; FADD
         /// </summary>
         public static Vector64<T>  Add<T>(Vector64<T>  left, Vector64<T>  right) where T : struct => Add(left, right);
         public static Vector128<T> Add<T>(Vector128<T> left, Vector128<T> right) where T : struct => Add(left, right);
@@ -58,7 +58,7 @@ namespace System.Runtime.Intrinsics.Arm.Arm64
         /// <summary>
         /// Vector BitwiseSelect
         /// For each bit in the vector result[bit] = sel[bit] ? left[bit] : right[bit]
-        /// Corresponds to vector forms of ARM64 BSL (Also BIF & BIT)
+        /// Corresponds to vector forms of ARM64 BSL (Also BIF &amp; BIT)
         /// </summary>
         public static Vector64<T>  BitwiseSelect<T>(Vector64<T>  sel, Vector64<T>  left, Vector64<T>  right) where T : struct => BitwiseSelect(sel, left, right);
         public static Vector128<T> BitwiseSelect<T>(Vector128<T> sel, Vector128<T> left, Vector128<T> right) where T : struct => BitwiseSelect(sel, left, right);
@@ -66,7 +66,7 @@ namespace System.Runtime.Intrinsics.Arm.Arm64
         /// <summary>
         /// Vector CompareEqual
         /// For each element result[elem] = (left[elem] == right[elem]) ? ~0 : 0
-        /// Corresponds to vector forms of ARM64 CMEQ & FCMEQ
+        /// Corresponds to vector forms of ARM64 CMEQ &amp; FCMEQ
         /// </summary>
         public static Vector64<T>  CompareEqual<T>(Vector64<T>  left, Vector64<T>  right) where T : struct => CompareEqual(left, right);
         public static Vector128<T> CompareEqual<T>(Vector128<T> left, Vector128<T> right) where T : struct => CompareEqual(left, right);
@@ -74,7 +74,7 @@ namespace System.Runtime.Intrinsics.Arm.Arm64
         /// <summary>
         /// Vector CompareEqualZero
         /// For each element result[elem] = (left[elem] == 0) ? ~0 : 0
-        /// Corresponds to vector forms of ARM64 CMEQ & FCMEQ
+        /// Corresponds to vector forms of ARM64 CMEQ &amp; FCMEQ
         /// </summary>
         public static Vector64<T>  CompareEqualZero<T>(Vector64<T>  value) where T : struct => CompareEqualZero(value);
         public static Vector128<T> CompareEqualZero<T>(Vector128<T> value) where T : struct => CompareEqualZero(value);
@@ -82,7 +82,7 @@ namespace System.Runtime.Intrinsics.Arm.Arm64
         /// <summary>
         /// Vector CompareGreaterThan
         /// For each element result[elem] = (left[elem] > right[elem]) ? ~0 : 0
-        /// Corresponds to vector forms of ARM64 CMGT/CMHI & FCMGT
+        /// Corresponds to vector forms of ARM64 CMGT/CMHI &amp; FCMGT
         /// </summary>
         public static Vector64<T>  CompareGreaterThan<T>(Vector64<T>  left, Vector64<T>  right) where T : struct => CompareGreaterThan(left, right);
         public static Vector128<T> CompareGreaterThan<T>(Vector128<T> left, Vector128<T> right) where T : struct => CompareGreaterThan(left, right);
@@ -90,7 +90,7 @@ namespace System.Runtime.Intrinsics.Arm.Arm64
         /// <summary>
         /// Vector CompareGreaterThanZero
         /// For each element result[elem] = (left[elem] > 0) ? ~0 : 0
-        /// Corresponds to vector forms of ARM64 CMGT & FCMGT
+        /// Corresponds to vector forms of ARM64 CMGT &amp; FCMGT
         /// </summary>
         public static Vector64<T>  CompareGreaterThanZero<T>(Vector64<T>  value) where T : struct => CompareGreaterThanZero(value);
         public static Vector128<T> CompareGreaterThanZero<T>(Vector128<T> value) where T : struct => CompareGreaterThanZero(value);
@@ -98,7 +98,7 @@ namespace System.Runtime.Intrinsics.Arm.Arm64
         /// <summary>
         /// Vector CompareGreaterThanOrEqual
         /// For each element result[elem] = (left[elem] >= right[elem]) ? ~0 : 0
-        /// Corresponds to vector forms of ARM64 CMGE/CMHS & FCMGE
+        /// Corresponds to vector forms of ARM64 CMGE/CMHS &amp; FCMGE
         /// </summary>
         public static Vector64<T>  CompareGreaterThanOrEqual<T>(Vector64<T>  left, Vector64<T>    right) where T : struct => CompareGreaterThanOrEqual(left, right);
         public static Vector128<T> CompareGreaterThanOrEqual<T>(Vector128<T> left, Vector128<T>   right) where T : struct => CompareGreaterThanOrEqual(left, right);
@@ -106,30 +106,30 @@ namespace System.Runtime.Intrinsics.Arm.Arm64
         /// <summary>
         /// Vector CompareGreaterThanOrEqualZero
         /// For each element result[elem] = (left[elem] >= 0) ? ~0 : 0
-        /// Corresponds to vector forms of ARM64 CMGE & FCMGE
+        /// Corresponds to vector forms of ARM64 CMGE &amp; FCMGE
         /// </summary>
         public static Vector64<T>  CompareGreaterThanOrEqualZero<T>(Vector64<T>  value) where T : struct => CompareGreaterThanOrEqualZero(value);
         public static Vector128<T> CompareGreaterThanOrEqualZero<T>(Vector128<T> value) where T : struct => CompareGreaterThanOrEqualZero(value);
 
         /// <summary>
         /// Vector CompareLessThanZero
-        /// For each element result[elem] = (left[elem] < 0) ? ~0 : 0
-        /// Corresponds to vector forms of ARM64 CMGT & FCMGT
+        /// For each element result[elem] = (left[elem] &lt; 0) ? ~0 : 0
+        /// Corresponds to vector forms of ARM64 CMGT &amp; FCMGT
         /// </summary>
         public static Vector64<T>  CompareLessThanZero<T>(Vector64<T>  value) where T : struct => CompareLessThanZero(value);
         public static Vector128<T> CompareLessThanZero<T>(Vector128<T> value) where T : struct => CompareLessThanZero(value);
 
         /// <summary>
         /// Vector CompareLessThanOrEqualZero
-        /// For each element result[elem] = (left[elem] < 0) ? ~0 : 0
-        /// Corresponds to vector forms of ARM64 CMGT & FCMGT
+        /// For each element result[elem] = (left[elem] &lt; 0) ? ~0 : 0
+        /// Corresponds to vector forms of ARM64 CMGT &amp; FCMGT
         /// </summary>
         public static Vector64<T>  CompareLessThanOrEqualZero<T>(Vector64<T>  value) where T : struct => CompareLessThanOrEqualZero(value);
         public static Vector128<T> CompareLessThanOrEqualZero<T>(Vector128<T> value) where T : struct => CompareLessThanOrEqualZero(value);
 
         /// <summary>
         /// Vector CompareTest
-        /// For each element result[elem] = (left[elem] & right[elem]) ? ~0 : 0
+        /// For each element result[elem] = (left[elem] &amp; right[elem]) ? ~0 : 0
         /// Corresponds to vector forms of ARM64 CMTST
         /// </summary>
         public static Vector64<T>  CompareTest<T>(Vector64<T>  left, Vector64<T>  right) where T : struct => CompareTest(left, right);
@@ -202,7 +202,7 @@ namespace System.Runtime.Intrinsics.Arm.Arm64
 
         /// <summary>
         /// Vector max
-        /// Corresponds to vector forms of ARM64 SMAX, UMAX & FMAX
+        /// Corresponds to vector forms of ARM64 SMAX, UMAX &amp; FMAX
         /// </summary>
         public static Vector64<byte>    Max(Vector64<byte>    left, Vector64<byte>    right) => Max(left, right);
         public static Vector64<sbyte>   Max(Vector64<sbyte>   left, Vector64<sbyte>   right) => Max(left, right);
@@ -222,7 +222,7 @@ namespace System.Runtime.Intrinsics.Arm.Arm64
 
         /// <summary>
         /// Vector min
-        /// Corresponds to vector forms of ARM64 SMIN, UMIN & FMIN
+        /// Corresponds to vector forms of ARM64 SMIN, UMIN &amp; FMIN
         /// </summary>
         public static Vector64<byte>    Min(Vector64<byte>    left, Vector64<byte>    right) => Min(left, right);
         public static Vector64<sbyte>   Min(Vector64<sbyte>   left, Vector64<sbyte>   right) => Min(left, right);
@@ -247,7 +247,7 @@ namespace System.Runtime.Intrinsics.Arm.Arm64
         ///
         /// For each element result[elem] = left[elem] * right[elem]
         ///
-        /// Corresponds to vector forms of ARM64 MUL & FMUL
+        /// Corresponds to vector forms of ARM64 MUL &amp; FMUL
         /// </summary>
         public static Vector64<byte>    Multiply(Vector64<byte>    left, Vector64<byte>    right) => Multiply(left, right);
         public static Vector64<sbyte>   Multiply(Vector64<sbyte>   left, Vector64<sbyte>   right) => Multiply(left, right);
@@ -267,7 +267,7 @@ namespace System.Runtime.Intrinsics.Arm.Arm64
 
         /// <summary>
         /// Vector negate
-        /// Corresponds to vector forms of ARM64 NEG & FNEG
+        /// Corresponds to vector forms of ARM64 NEG &amp; FNEG
         /// </summary>
         public static Vector64<sbyte>   Negate(Vector64<sbyte>   value) => Negate(value);
         public static Vector64<short>   Negate(Vector64<short>   value) => Negate(value);
@@ -328,7 +328,7 @@ namespace System.Runtime.Intrinsics.Arm.Arm64
 
         /// <summary>
         /// Vector subtract
-        /// Corresponds to vector forms of ARM64 SUB & FSUB
+        /// Corresponds to vector forms of ARM64 SUB &amp; FSUB
         /// </summary>
         public static Vector64<T>  Subtract<T>(Vector64<T>  left, Vector64<T>  right) where T : struct => Subtract(left, right);
         public static Vector128<T> Subtract<T>(Vector128<T> left, Vector128<T> right) where T : struct => Subtract(left, right);
index e723d13..6f444bb 100644 (file)
@@ -736,7 +736,7 @@ namespace System.Runtime.Intrinsics.X86
         ///   VEXTRACTI128 xmm, ymm, imm8
         /// </summary>
         public new static Vector128<sbyte> ExtractVector128(Vector256<sbyte> value, byte index) { throw new PlatformNotSupportedException(); }
-        // <summary>
+        /// <summary>
         /// __m128i _mm256_extracti128_si256 (__m256i a, const int imm8)
         ///   VEXTRACTI128 m128, ymm, imm8
         /// </summary>
index eb0a081..70290b3 100644 (file)
@@ -1556,7 +1556,7 @@ namespace System.Runtime.Intrinsics.X86
         /// <summary>
         /// __m128i _mm_unpackhi_epi16 (__m128i a,  __m128i b)
         ///   PUNPCKHWD xmm, xmm/m128
-        /// </summary
+        /// </summary>
         public static Vector128<ushort> UnpackHigh(Vector128<ushort> left, Vector128<ushort> right) { throw new PlatformNotSupportedException(); }
         /// <summary>
         /// __m128i _mm_unpackhi_epi32 (__m128i a,  __m128i b)