1024
};
-struct SDLAudioState {
+static struct SDLAudioState {
int exit;
SDL_mutex *mutex;
SDL_sem *sem;
bdrv_close(bs->backing_hd);
}
-int parent_open = 0;
+static int parent_open = 0;
static int vmdk_parent_open(BlockDriverState *bs, const char * filename)
{
BDRVVmdkState *s = bs->opaque;
done
echo >> $output
+echo "extern const char *const xml_builtin[][2];" >> $output
echo "const char *const xml_builtin[][2] = {" >> $output
for input; do
#define SNAN_BIT_IS_ONE 0
#endif
-/*----------------------------------------------------------------------------
-| Underflow tininess-detection mode, statically initialized to default value.
-| (The declaration in `softfloat.h' must match the `int8' type here.)
-*----------------------------------------------------------------------------*/
-int8 float_detect_tininess = float_tininess_after_rounding;
-
/*----------------------------------------------------------------------------
| Raises the exceptions specified by `flags'. Floating-point traps can be
| defined here if desired. It is currently not possible for such a trap
};
/* LMP layer emulation */
+#if 0
static void bt_submit_lmp(struct bt_device_s *bt, int length, uint8_t *data)
{
int resp, resplen, error, op, tr;
respdata[0] |= tr;
}
-void bt_submit_raw_acl(struct bt_piconet_s *net, int length, uint8_t *data)
+static void bt_submit_raw_acl(struct bt_piconet_s *net, int length, uint8_t *data)
{
struct bt_device_s *slave;
if (length < 1)
break;
}
}
+#endif
/* HCI layer emulation */
bt_hci_lmp_mode_change_master(hci, link, acl_active, 0);
}
-void bt_hci_reset(struct bt_hci_s *hci)
+static void bt_hci_reset(struct bt_hci_s *hci)
{
hci->acl_len = 0;
hci->last_cmd = 0;
s->status |= 1 << 5;
}
-void retu_head_event(void *retu, int state)
+#if 0
+static void retu_head_event(void *retu, int state)
{
struct cbus_slave_s *slave = (struct cbus_slave_s *) retu;
struct cbus_retu_s *s = (struct cbus_retu_s *) slave->opaque;
s->result[retu_adc_head_det] = 123;
}
-void retu_hook_event(void *retu, int state)
+static void retu_hook_event(void *retu, int state)
{
struct cbus_slave_s *slave = (struct cbus_slave_s *) retu;
struct cbus_retu_s *s = (struct cbus_retu_s *) slave->opaque;
else
s->result[retu_adc_hook_det] = 123;
}
+#endif
/* Tahvo/Betty */
struct cbus_tahvo_s {
}
}
-extern PCIDevice *piix4_dev;
static int pci_irq_levels[4];
static void pci_gt64120_set_irq(qemu_irq *pic, int irq_num, int level)
}
}
-CPUReadMemoryFunc *mst_fpga_readfn[] = {
+static CPUReadMemoryFunc *mst_fpga_readfn[] = {
mst_fpga_readb,
mst_fpga_readb,
mst_fpga_readb,
};
-CPUWriteMemoryFunc *mst_fpga_writefn[] = {
+static CPUWriteMemoryFunc *mst_fpga_writefn[] = {
mst_fpga_writeb,
mst_fpga_writeb,
mst_fpga_writeb,
/* Wolfson 8750 I2C address */
#define MP_WM_ADDR 0x34
-const char audio_name[] = "mv88w8618";
+static const char audio_name[] = "mv88w8618";
typedef struct musicpal_audio_state {
uint32_t base;
# include "nand.c"
/* Information based on Linux drivers/mtd/nand/nand_ids.c */
-struct nand_info_s {
+static const struct nand_info_s {
int size;
int width;
int page_shift;
omap_badwidth_write8,
};
-struct omap_sti_s *omap_sti_init(struct omap_target_agent_s *ta,
+static struct omap_sti_s *omap_sti_init(struct omap_target_agent_s *ta,
target_phys_addr_t channel_base, qemu_irq irq, omap_clk clk,
CharDriverState *chr)
{
/* If a clock is allowed to idle, it is disabled automatically when
* all of clock domains using it are disabled. */
-int omap_clk_is_idle(struct clk *clk)
+static int omap_clk_is_idle(struct clk *clk)
{
struct clk *chld;
IRQ_INTERNAL = 0x02,
IRQ_TIMER = 0x04,
IRQ_SPECIAL = 0x08,
-} IRQ_src_type;
+};
typedef struct IRQ_queue_t {
uint32_t queue[BF_WIDTH(MAX_IRQ)];
int piix3_init(PCIBus *bus, int devfn);
void i440fx_init_memory_mappings(PCIDevice *d);
+extern PCIDevice *piix4_dev;
int piix4_init(PCIBus *bus, int devfn);
/* vga.c */
int it_shift;
} KBDState;
-KBDState kbd_state;
+static KBDState kbd_state;
/* update irq and KBD_STAT_[MOUSE_]OBF */
/* XXX: not generating the irqs if KBD_MODE_DISABLE_KBD is set may be
/* PIIX3 PCI to ISA bridge */
-PCIDevice *piix3_dev;
+static PCIDevice *piix3_dev;
PCIDevice *piix4_dev;
/* just used for simpler irq handling. */
}
/* Specific helpers for POWER & PowerPC 601 RTC */
-clk_setup_cb cpu_ppc601_rtc_init (CPUState *env)
+#if 0
+static clk_setup_cb cpu_ppc601_rtc_init (CPUState *env)
{
return cpu_ppc_tb_init(env, 7812500);
}
+#endif
void cpu_ppc601_store_rtcu (CPUState *env, uint32_t value)
{
return tmp;
}
-uint16_t NVRAM_compute_crc (nvram_t *nvram, uint32_t start, uint32_t count)
+static uint16_t NVRAM_compute_crc (nvram_t *nvram, uint32_t start, uint32_t count)
{
uint32_t i;
uint16_t crc = 0xFFFF;
extern CPUWriteMemoryFunc *PPC_io_write[];
extern CPUReadMemoryFunc *PPC_io_read[];
void PPC_debug_write (void *opaque, uint32_t addr, uint32_t val);
+
+void ppc40x_irq_init (CPUState *env);
+void ppc6xx_irq_init (CPUState *env);
+void ppc970_irq_init (CPUState *env);
/* ISA IO ports bridge */
#define PPC_IO_BASE 0x80000000
+#if 0
/* Speaker port 0x61 */
-int speaker_data_on;
-int dummy_refresh_clock;
+static int speaker_data_on;
+static int dummy_refresh_clock;
+#endif
static void speaker_ioport_write (void *opaque, uint32_t addr, uint32_t val)
{
return ret;
}
-CPUWriteMemoryFunc *PPC_prep_io_write[] = {
+static CPUWriteMemoryFunc *PPC_prep_io_write[] = {
&PPC_prep_io_writeb,
&PPC_prep_io_writew,
&PPC_prep_io_writel,
};
-CPUReadMemoryFunc *PPC_prep_io_read[] = {
+static CPUReadMemoryFunc *PPC_prep_io_read[] = {
&PPC_prep_io_readb,
&PPC_prep_io_readw,
&PPC_prep_io_readl,
RTL8139TallyCounters_clear(&s->tally_counters);
}
-void RTL8139TallyCounters_clear(RTL8139TallyCounters* counters)
+static void RTL8139TallyCounters_clear(RTL8139TallyCounters* counters)
{
counters->TxOk = 0;
counters->RxOk = 0;
#include "qemu-timer.h"
#include "soc_dma.h"
-void transfer_mem2mem(struct soc_dma_ch_s *ch)
+static void transfer_mem2mem(struct soc_dma_ch_s *ch)
{
memcpy(ch->paddr[0], ch->paddr[1], ch->bytes);
ch->paddr[0] += ch->bytes;
ch->paddr[1] += ch->bytes;
}
-void transfer_mem2fifo(struct soc_dma_ch_s *ch)
+static void transfer_mem2fifo(struct soc_dma_ch_s *ch)
{
ch->io_fn[1](ch->io_opaque[1], ch->paddr[0], ch->bytes);
ch->paddr[0] += ch->bytes;
}
-void transfer_fifo2mem(struct soc_dma_ch_s *ch)
+static void transfer_fifo2mem(struct soc_dma_ch_s *ch)
{
ch->io_fn[0](ch->io_opaque[0], ch->paddr[1], ch->bytes);
ch->paddr[1] += ch->bytes;
* oprating systems may not need to use them. */
static void *fifo_buf;
static int fifo_size;
-void transfer_fifo2fifo(struct soc_dma_ch_s *ch)
+static void transfer_fifo2fifo(struct soc_dma_ch_s *ch)
{
if (ch->bytes > fifo_size)
fifo_buf = qemu_realloc(fifo_buf, fifo_size = ch->bytes);
}
}
-void handle_command(tc58128_dev * dev, uint8_t command)
+static void handle_command(tc58128_dev * dev, uint8_t command)
{
switch (command) {
case 0xff:
}
}
-void handle_address(tc58128_dev * dev, uint8_t data)
+static void handle_address(tc58128_dev * dev, uint8_t data)
{
switch (dev->state) {
case READ1:
}
}
-uint8_t handle_read(tc58128_dev * dev)
+static uint8_t handle_read(tc58128_dev * dev)
{
#if 0
if (dev->address % 0x100000 == 0)
/* We never mark the device as busy, so interrupts cannot be triggered
XXXXX */
-int tc58128_cb(uint16_t porta, uint16_t portb,
- uint16_t * periph_pdtra, uint16_t * periph_portadir,
- uint16_t * periph_pdtrb, uint16_t * periph_portbdir)
+static int tc58128_cb(uint16_t porta, uint16_t portb,
+ uint16_t * periph_pdtra, uint16_t * periph_portadir,
+ uint16_t * periph_pdtrb, uint16_t * periph_portbdir)
{
int dev;
#include "hw.h"
#include "qemu-timer.h"
#include "console.h"
+#include "devices.h"
#define TSC_CUT_RESOLUTION(value, p) ((value) >> (16 - (p ? 12 : 10)))
tsc2005_pin_update(s);
}
-uint8_t tsc2005_txrx_word(void *opaque, uint8_t value)
+static uint8_t tsc2005_txrx_word(void *opaque, uint8_t value)
{
struct tsc2005_state_s *s = opaque;
uint32_t ret = 0;
#include "qemu-timer.h"
#include "console.h"
#include "omap.h" /* For struct i2s_codec_s and struct uwire_slave_s */
+#include "devices.h"
#define TSC_DATA_REGISTERS_PAGE 0x0
#define TSC_CONTROL_REGISTERS_PAGE 0x1
#include "usb.h"
#include "omap.h"
#include "irq.h"
+#include "devices.h"
struct tusb_s {
int iomemtype[2];
}
}
-CPUReadMemoryFunc *scoop_readfn[] = {
+static CPUReadMemoryFunc *scoop_readfn[] = {
scoop_readb,
scoop_readb,
scoop_readb,
};
-CPUWriteMemoryFunc *scoop_writefn[] = {
+static CPUWriteMemoryFunc *scoop_writefn[] = {
scoop_writeb,
scoop_writeb,
scoop_writeb,
#define MAGIC_CHG(a, b, c, d) ((d << 24) | (c << 16) | (b << 8) | a)
-struct __attribute__ ((__packed__)) sl_param_info {
+static struct __attribute__ ((__packed__)) sl_param_info {
uint32_t comadj_keyword;
int32_t comadj;
return p;
}
-int target_pread(int fd, abi_ulong ptr, abi_ulong len,
- abi_ulong offset)
+static int target_pread(int fd, abi_ulong ptr, abi_ulong len,
+ abi_ulong offset)
{
void *buf;
int ret;
/****************************************************************************/
/* ??? This does not handle endianness correctly. */
-void old_reloc(struct lib_info *libinfo, uint32_t rl)
+static void old_reloc(struct lib_info *libinfo, uint32_t rl)
{
#ifdef DEBUG
char *segment[] = { "TEXT", "DATA", "BSS", "*UNKNOWN*" };
}
#ifdef TARGET_X86_64
-uint64_t idt_table[512];
+static uint64_t idt_table[512];
static void set_gate64(void *ptr, unsigned int type, unsigned int dpl,
uint64_t addr, unsigned int sel)
set_gate64(idt_table + n * 2, 0, dpl, 0, 0);
}
#else
-uint64_t idt_table[256];
+static uint64_t idt_table[256];
static void set_gate(void *ptr, unsigned int type, unsigned int dpl,
uint32_t addr, unsigned int sel)
#if defined(TARGET_I386)
/* NOTE: there is really one LDT for all the threads */
-uint8_t *ldt_table;
+static uint8_t *ldt_table;
static abi_long read_ldt(abi_ulong ptr, unsigned long bytecount)
{
static void monitor_start_input(void);
-CPUState *mon_cpu = NULL;
+static CPUState *mon_cpu = NULL;
void term_flush(void)
{
#define NBD_BUFFER_SIZE (1024*1024)
-int verbose;
+static int verbose;
static void usage(const char *name)
{
/* Return the name for membar value VALUE or NULL if not found. */
-const char *
+static const char *
sparc_decode_membar (value)
int value;
{
/* Return the name for prefetch value VALUE or NULL if not found. */
-const char *
+static const char *
sparc_decode_prefetch (value)
int value;
{
/* Return the name for sparclet cpreg value VALUE or NULL if not found. */
-const char *
+static const char *
sparc_decode_sparclet_cpreg (value)
int value;
{
/* thread support */
-spinlock_t global_cpu_lock = SPIN_LOCK_UNLOCKED;
+static spinlock_t global_cpu_lock = SPIN_LOCK_UNLOCKED;
void cpu_lock(void)
{
dead_tmp(tmp);
}
-const uint8_t table_logic_cc[16] = {
+static const uint8_t table_logic_cc[16] = {
1, /* and */
1, /* xor */
0, /* sub */
/* broken thread support */
-spinlock_t global_cpu_lock = SPIN_LOCK_UNLOCKED;
+static spinlock_t global_cpu_lock = SPIN_LOCK_UNLOCKED;
void helper_lock(void)
{
return; \
}
-void _decode_opc(DisasContext * ctx)
+static void _decode_opc(DisasContext * ctx)
{
#if 0
fprintf(stderr, "Translating opcode 0x%04x\n", ctx->opcode);
ctx->bstate = BS_EXCP;
}
-void decode_opc(DisasContext * ctx)
+static void decode_opc(DisasContext * ctx)
{
uint32_t old_flags = ctx->flags;
#undef DEF2
};
-TCGRegSet tcg_target_available_regs[2];
-TCGRegSet tcg_target_call_clobber_regs;
+static TCGRegSet tcg_target_available_regs[2];
+static TCGRegSet tcg_target_call_clobber_regs;
/* XXX: move that inside the context */
uint16_t *gen_opc_ptr;