drm/mxsfb: Read bus flags from bridge if present
authorGuido Günther <agx@sigxcpu.org>
Thu, 29 Aug 2019 11:30:03 +0000 (14:30 +0300)
committerStefan Agner <stefan@agner.ch>
Mon, 14 Oct 2019 20:19:32 +0000 (22:19 +0200)
The bridge might have special requirmentes on the input bus. This
is e.g. used by the imx-nwl bridge.

Signed-off-by: Guido Günther <agx@sigxcpu.org>
Reviewed-by: Stefan Agner <stefan@agner.ch>
Signed-off-by: Stefan Agner <stefan@agner.ch>
Link: https://patchwork.freedesktop.org/patch/msgid/1567078215-31601-3-git-send-email-robert.chiras@nxp.com
drivers/gpu/drm/mxsfb/mxsfb_crtc.c

index de09b93..b69ace8 100644 (file)
@@ -209,7 +209,7 @@ static void mxsfb_crtc_mode_set_nofb(struct mxsfb_drm_private *mxsfb)
 {
        struct drm_device *drm = mxsfb->pipe.crtc.dev;
        struct drm_display_mode *m = &mxsfb->pipe.crtc.state->adjusted_mode;
-       const u32 bus_flags = mxsfb->connector->display_info.bus_flags;
+       u32 bus_flags = mxsfb->connector->display_info.bus_flags;
        u32 vdctrl0, vsync_pulse_len, hsync_pulse_len;
        int err;
 
@@ -233,6 +233,9 @@ static void mxsfb_crtc_mode_set_nofb(struct mxsfb_drm_private *mxsfb)
 
        clk_set_rate(mxsfb->clk, m->crtc_clock * 1000);
 
+       if (mxsfb->bridge && mxsfb->bridge->timings)
+               bus_flags = mxsfb->bridge->timings->input_bus_flags;
+
        DRM_DEV_DEBUG_DRIVER(drm->dev, "Pixel clock: %dkHz (actual: %dkHz)\n",
                             m->crtc_clock,
                             (int)(clk_get_rate(mxsfb->clk) / 1000));