radeonsi/gfx11: use correct VGT_TESS_DISTRIBUTION settings
authorMarek Olšák <marek.olsak@amd.com>
Mon, 11 Jul 2022 03:12:06 +0000 (23:12 -0400)
committerMarge Bot <emma+marge@anholt.net>
Wed, 3 Aug 2022 00:57:16 +0000 (00:57 +0000)
Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/17864>

src/gallium/drivers/radeonsi/si_state.c

index 2d82648..a87e6a4 100644 (file)
@@ -5706,7 +5706,14 @@ void si_init_cs_preamble_state(struct si_context *sctx, bool uses_reg_shadowing)
    if (sctx->gfx_level >= GFX8) {
       unsigned vgt_tess_distribution;
 
-      if (sctx->gfx_level >= GFX9) {
+      if (sctx->gfx_level >= GFX11) {
+         /* ACCUM fields changed their meaning. */
+         vgt_tess_distribution = S_028B50_ACCUM_ISOLINE(255) |
+                                 S_028B50_ACCUM_TRI(255) |
+                                 S_028B50_ACCUM_QUAD(255) |
+                                 S_028B50_DONUT_SPLIT_GFX9(24) |
+                                 S_028B50_TRAP_SPLIT(6);
+      } else if (sctx->gfx_level >= GFX9) {
          vgt_tess_distribution = S_028B50_ACCUM_ISOLINE(12) |
                                  S_028B50_ACCUM_TRI(30) |
                                  S_028B50_ACCUM_QUAD(24) |