defxx: DEFEA's Burst Holdoff register initialization fix

Use the mask rather than bit number macro to initialize the chip select
control bit for PDQ register space decoding in the Burst Holdoff register.

Signed-off-by: Maciej W. Rozycki <macro@linux-mips.org>
Signed-off-by: David S. Miller <davem@davemloft.net>

diff --git a/drivers/net/fddi/defxx.c b/drivers/net/fddi/defxx.c
index 6068db8..15a18fb 100644 (file)
--- a/drivers/net/fddi/defxx.c
+++ b/drivers/net/fddi/defxx.c
@@ -748,9 +748,9 @@ static void dfx_bus_init(struct net_device *dev)
                 */
                val = inb(base_addr + PI_DEFEA_K_BURST_HOLDOFF);
                if (dfx_use_mmio)
-                       val |= PI_BURST_HOLDOFF_V_MEM_MAP;
+                       val |= PI_BURST_HOLDOFF_M_MEM_MAP;
                else
-                       val &= ~PI_BURST_HOLDOFF_V_MEM_MAP;
+                       val &= ~PI_BURST_HOLDOFF_M_MEM_MAP;
                outb(val, base_addr + PI_DEFEA_K_BURST_HOLDOFF);
 
                /* Enable interrupts at EISA bus interface chip (ESIC) */