Skip gc-sections if relocation is incompatible
authorH.J. Lu <hjl.tools@gmail.com>
Thu, 26 Mar 2015 15:22:08 +0000 (08:22 -0700)
committerH.J. Lu <hjl.tools@gmail.com>
Thu, 26 Mar 2015 15:22:55 +0000 (08:22 -0700)
This patch skips gc-sections if input relocation is incompatible with
output.

bfd/

PR ld/18160
* elflink.c (elf_gc_sweep): Skip if relocation is incompatible.
(bfd_elf_gc_sections): Likewise.

ld/testsuite/

PR ld/18160
* ld-x86-64/pr18160.d: New file.
* ld-x86-64/pr18160.s: Likewise.
* ld-x86-64/pr18160.t: Likewise.
* ld-x86-64/x86-64.exp: Run pr18160.

bfd/ChangeLog
bfd/elflink.c
ld/testsuite/ChangeLog
ld/testsuite/ld-x86-64/pr18160.d [new file with mode: 0644]
ld/testsuite/ld-x86-64/pr18160.s [new file with mode: 0644]
ld/testsuite/ld-x86-64/pr18160.t [new file with mode: 0644]
ld/testsuite/ld-x86-64/x86-64.exp

index 014e30d..ae84f5f 100644 (file)
@@ -1,3 +1,9 @@
+2015-03-26  H.J. Lu  <hongjiu.lu@intel.com>
+
+       PR ld/18160
+       * elflink.c (elf_gc_sweep): Skip if relocation is incompatible.
+       (bfd_elf_gc_sections): Likewise.
+
 2015-03-25  Marcus Shawcroft  <marcus.shawcroft@arm.com>
 
        * elfnn-aarch64.c (_bfd_aarch64_resize_stubs): Adjust stub section
index 9ccad8c..748ff1b 100644 (file)
@@ -12159,7 +12159,8 @@ elf_gc_sweep (bfd *abfd, struct bfd_link_info *info)
     {
       asection *o;
 
-      if (bfd_get_flavour (sub) != bfd_target_elf_flavour)
+      if (bfd_get_flavour (sub) != bfd_target_elf_flavour
+         || !(*bed->relocs_compatible) (sub->xvec, abfd->xvec))
        continue;
 
       for (o = sub->sections; o != NULL; o = o->next)
@@ -12446,7 +12447,8 @@ bfd_elf_gc_sections (bfd *abfd, struct bfd_link_info *info)
     {
       asection *o;
 
-      if (bfd_get_flavour (sub) != bfd_target_elf_flavour)
+      if (bfd_get_flavour (sub) != bfd_target_elf_flavour
+         || !(*bed->relocs_compatible) (sub->xvec, abfd->xvec))
        continue;
 
       /* Start at sections marked with SEC_KEEP (ref _bfd_elf_gc_keep).
index c4ce066..31e6ffc 100644 (file)
@@ -1,3 +1,11 @@
+2015-03-26  H.J. Lu  <hongjiu.lu@intel.com>
+
+       PR ld/18160
+       * ld-x86-64/pr18160.d: New file.
+       * ld-x86-64/pr18160.s: Likewise.
+       * ld-x86-64/pr18160.t: Likewise.
+       * ld-x86-64/x86-64.exp: Run pr18160.
+---
 2015-03-25  Marcus Shawcroft  <marcus.shawcroft@arm.com>
 
        * ld-aarch64/erratum835769.d: Adjust for initial branch over stub
diff --git a/ld/testsuite/ld-x86-64/pr18160.d b/ld/testsuite/ld-x86-64/pr18160.d
new file mode 100644 (file)
index 0000000..b944bbe
--- /dev/null
@@ -0,0 +1,14 @@
+#as: --64
+#ld: --gc-sections -melf_x86_64 -T pr18160.t
+#objdump: -dw
+
+.*: +file format elf32-i386
+
+
+Disassembly of section .text:
+
+0+ <start>:
+[      ]*[a-f0-9]+:    e9 00 00 00 00          jmp    5 <foo>
+
+0+5 <foo>:
+[      ]*[a-f0-9]+:    c3                      ret    
diff --git a/ld/testsuite/ld-x86-64/pr18160.s b/ld/testsuite/ld-x86-64/pr18160.s
new file mode 100644 (file)
index 0000000..a0331aa
--- /dev/null
@@ -0,0 +1,16 @@
+       .section        .text.start,"ax",@progbits
+       .globl  start
+       .type   start, @function
+start:
+       .cfi_startproc
+       jmp     foo
+       .cfi_endproc
+       .size   start, .-start
+       .section        .text.foo,"ax",@progbits
+       .globl  foo
+       .type   foo, @function
+foo:
+       .cfi_startproc
+       ret
+       .cfi_endproc
+       .size   foo, .-foo
diff --git a/ld/testsuite/ld-x86-64/pr18160.t b/ld/testsuite/ld-x86-64/pr18160.t
new file mode 100644 (file)
index 0000000..d3906e3
--- /dev/null
@@ -0,0 +1,8 @@
+OUTPUT_FORMAT(elf32-i386)
+ENTRY(start)
+SECTIONS
+{
+  .text : { *(.text*) }
+  .data : { *(.data.*) }
+  .bss : { *(.bss.*) }
+}
index 43427be..7bceb7f 100644 (file)
@@ -317,6 +317,7 @@ run_dump_test "mov1c"
 run_dump_test "mov1d"
 run_dump_test "pr17935-1"
 run_dump_test "pr17935-2"
+run_dump_test "pr18160"
 
 # Must be native with the C compiler
 if { [isnative] && [which $CC] != 0 } {