/dts-v1/;
#include "th1520.dtsi"
+#include <dt-bindings/pinctrl/light-fm-left-pinctrl.h>
+#include <dt-bindings/pinctrl/light-fm-right-pinctrl.h>
/ {
model = "Sipeed Lichee Module 4A";
};
};
+&padctrl1_apsys {
+ light-evb-padctrl1 {
+ /*
+ * Pin Configuration Node:
+ * Format: <pin_id mux_node config>
+ */
+ pinctrl_qspi1: qspi1grp {
+ thead,pins = <
+ FM_QSPI1_SCLK 0x0 0x20a
+ FM_QSPI1_CSN0 0x3 0x20a
+ FM_QSPI1_D0_MOSI 0x0 0x23a
+ FM_QSPI1_D1_MISO 0x0 0x23a
+ >;
+ };
+
+ pinctrl_i2c0: i2c0grp {
+ thead,pins = <
+ FM_I2C0_SCL 0x0 0x204
+ FM_I2C0_SDA 0x0 0x204
+ >;
+ };
+
+ pinctrl_i2c1: i2c1grp {
+ thead,pins = <
+ FM_I2C1_SCL 0x0 0x204
+ FM_I2C1_SDA 0x0 0x204
+ >;
+ };
+
+ pinctrl_uart1: uart1grp {
+ thead,pins = <
+ FM_UART1_TXD 0x0 0x202
+ FM_UART1_RXD 0x0 0x202
+ >;
+ };
+
+ pinctrl_uart4: uart4grp {
+ thead,pins = <
+ FM_UART4_TXD 0x0 0x202
+ FM_UART4_RXD 0x0 0x202
+ FM_UART4_CTSN 0x0 0x202
+ FM_UART4_RTSN 0x0 0x202
+ >;
+ };
+
+ pinctrl_uart3: uart3grp {
+ thead,pins = <
+ FM_UART3_TXD 0x1 0x202
+ FM_UART3_RXD 0x1 0x202
+ >;
+ };
+
+ pinctrl_wifi_wake: wifi_grp {
+ thead,pins = <
+ FM_GPIO0_27 0x0 0x202
+ >;
+ };
+
+ pinctrl_bt_wake: bt_grp {
+ thead,pins = <
+ FM_GPIO0_28 0x0 0x202
+ >;
+ };
+
+ pinctrl_iso7816: iso7816grp {
+ thead,pins = <
+ FM_QSPI1_SCLK 0x1 0x208
+ FM_QSPI1_D0_MOSI 0x1 0x238
+ FM_QSPI1_D1_MISO 0x1 0x238
+ FM_QSPI1_D2_WP 0x1 0x238
+ FM_QSPI1_D3_HOLD 0x1 0x238
+ >;
+ };
+
+ pinctrl_volume: volume_grp {
+ thead,pins = <
+ FM_CLK_OUT_2 0x3 0x208
+ >;
+ };
+ };
+};
+
+&padctrl0_apsys {
+ light-evb-padctrl0 {
+ /*
+ * Pin Configuration Node:
+ * Format: <pin_id mux_node config>
+ */
+ pinctrl_uart0: uart0grp {
+ thead,pins = <
+ FM_UART0_TXD 0x0 0x202
+ FM_UART0_RXD 0x0 0x202
+ >;
+ };
+
+ pinctrl_i2c2: i2c2grp {
+ thead,pins = <
+ FM_I2C2_SCL 0x0 0x204
+ FM_I2C2_SDA 0x0 0x204
+ >;
+ };
+
+ pinctrl_i2c3: i2c3grp {
+ thead,pins = <
+ FM_I2C3_SCL 0x0 0x204
+ FM_I2C3_SDA 0x0 0x204
+ >;
+ };
+
+ pinctrl_spi0: spi0grp {
+ thead,pins = <
+ FM_SPI_CSN 0x3 0x20a
+ FM_SPI_SCLK 0x0 0x20a
+ FM_SPI_MISO 0x0 0x23a
+ FM_SPI_MOSI 0x0 0x23a
+ >;
+ };
+
+ pinctrl_qspi0: qspi0grp {
+ thead,pins = <
+ FM_QSPI0_SCLK 0x0 0x20f
+ FM_QSPI0_CSN0 0x3 0x20f
+ FM_QSPI0_CSN1 0x0 0x20f
+ FM_QSPI0_D0_MOSI 0x0 0x23f
+ FM_QSPI0_D1_MISO 0x0 0x23f
+ FM_QSPI0_D2_WP 0x0 0x23f
+ FM_QSPI0_D3_HOLD 0x0 0x23f
+ >;
+ };
+
+ pinctrl_light_i2s0: i2s0grp {
+ thead,pins = <
+ FM_QSPI0_SCLK 0x2 0x208
+ FM_QSPI0_CSN0 0x2 0x238
+ FM_QSPI0_CSN1 0x2 0x208
+ FM_QSPI0_D0_MOSI 0x2 0x238
+ FM_QSPI0_D1_MISO 0x2 0x238
+ FM_QSPI0_D2_WP 0x2 0x238
+ FM_QSPI0_D3_HOLD 0x2 0x238
+ >;
+ };
+
+ pinctrl_gmac1: gmac1grp {
+ thead,pins = <
+ FM_GPIO2_18 0x1 0x20f /* GMAC1_TX_CLK */
+ FM_GPIO2_19 0x1 0x20f /* GMAC1_RX_CLK */
+ FM_GPIO2_20 0x1 0x20f /* GMAC1_TXEN */
+ FM_GPIO2_21 0x1 0x20f /* GMAC1_TXD0 */
+ FM_GPIO2_22 0x1 0x20f /* GMAC1_TXD1 */
+ FM_GPIO2_23 0x1 0x20f /* GMAC1_TXD2 */
+ FM_GPIO2_24 0x1 0x20f /* GMAC1_TXD3 */
+ FM_GPIO2_25 0x1 0x20f /* GMAC1_RXDV */
+ FM_GPIO2_30 0x1 0x20f /* GMAC1_RXD0 */
+ FM_GPIO2_31 0x1 0x20f /* GMAC1_RXD1 */
+ FM_GPIO3_0 0x1 0x20f /* GMAC1_RXD2 */
+ FM_GPIO3_1 0x1 0x20f /* GMAC1_RXD3 */
+ >;
+ };
+
+ pinctrl_sdio0: sdio0grp {
+ thead,pins = <
+ FM_SDIO0_DETN 0x0 0x202
+ >;
+ };
+
+ pinctrl_pwm: pwmgrp {
+ thead,pins = <
+ FM_GPIO3_2 0x1 0x20f /* pwm0 */
+ FM_GPIO3_3 0x1 0x20f /* pwm1 */
+ >;
+ };
+
+ pinctrl_hdmi: hdmigrp {
+ thead,pins = <
+ FM_HDMI_SCL 0x0 0x202
+ FM_HDMI_SDA 0x0 0x202
+ FM_HDMI_CEC 0x0 0x202
+ >;
+ };
+
+ pinctrl_gmac0: gmac0grp {
+ thead,pins = <
+ FM_GMAC0_TX_CLK 0x0 0x20f /* GMAC0_TX_CLK */
+ FM_GMAC0_RX_CLK 0x0 0x20f /* GMAC0_RX_CLK */
+ FM_GMAC0_TXEN 0x0 0x20f /* GMAC0_TXEN */
+ FM_GMAC0_TXD0 0x0 0x20f /* GMAC0_TXD0 */
+ FM_GMAC0_TXD1 0x0 0x20f /* GMAC0_TXD1 */
+ FM_GMAC0_TXD2 0x0 0x20f /* GMAC0_TXD2 */
+ FM_GMAC0_TXD3 0x0 0x20f /* GMAC0_TXD3 */
+ FM_GMAC0_RXDV 0x0 0x20f /* GMAC0_RXDV */
+ FM_GMAC0_RXD0 0x0 0x20f /* GMAC0_RXD0 */
+ FM_GMAC0_RXD1 0x0 0x20f /* GMAC0_RXD1 */
+ FM_GMAC0_RXD2 0x0 0x20f /* GMAC0_RXD2 */
+ FM_GMAC0_RXD3 0x0 0x20f /* GMAC0_RXD3 */
+ FM_GMAC0_MDC 0x0 0x208 /* GMAC0_MDC */
+ FM_GMAC0_MDIO 0x0 0x208 /* GMAC0_MDIO */
+ FM_GMAC0_COL 0x3 0x232 /* PHY0_nRST */
+ FM_GMAC0_CRS 0x3 0x232 /* PHY0_nINT */
+ >;
+ };
+ };
+};
+
&osc {
clock-frequency = <24000000>;
};
*/
#include "th1520-lichee-module-4a.dtsi"
-#include <dt-bindings/pinctrl/light-fm-left-pinctrl.h>
-#include <dt-bindings/pinctrl/light-fm-right-pinctrl.h>
-
/ {
model = "Sipeed Lichee Pi 4A";
status = "okay";
};
-&padctrl1_apsys {
- light-evb-padctrl1 {
- /*
- * Pin Configuration Node:
- * Format: <pin_id mux_node config>
- */
- pinctrl_qspi1: qspi1grp {
- thead,pins = <
- FM_QSPI1_SCLK 0x0 0x20a
- FM_QSPI1_CSN0 0x3 0x20a
- FM_QSPI1_D0_MOSI 0x0 0x23a
- FM_QSPI1_D1_MISO 0x0 0x23a
- >;
- };
-
- pinctrl_i2c0: i2c0grp {
- thead,pins = <
- FM_I2C0_SCL 0x0 0x204
- FM_I2C0_SDA 0x0 0x204
- >;
- };
-
- pinctrl_i2c1: i2c1grp {
- thead,pins = <
- FM_I2C1_SCL 0x0 0x204
- FM_I2C1_SDA 0x0 0x204
- >;
- };
-
- pinctrl_uart1: uart1grp {
- thead,pins = <
- FM_UART1_TXD 0x0 0x202
- FM_UART1_RXD 0x0 0x202
- >;
- };
-
- pinctrl_uart4: uart4grp {
- thead,pins = <
- FM_UART4_TXD 0x0 0x202
- FM_UART4_RXD 0x0 0x202
- FM_UART4_CTSN 0x0 0x202
- FM_UART4_RTSN 0x0 0x202
- >;
- };
-
- pinctrl_uart3: uart3grp {
- thead,pins = <
- FM_UART3_TXD 0x1 0x202
- FM_UART3_RXD 0x1 0x202
- >;
- };
-
- pinctrl_wifi_wake: wifi_grp {
- thead,pins = <
- FM_GPIO0_27 0x0 0x202
- >;
- };
-
- pinctrl_bt_wake: bt_grp {
- thead,pins = <
- FM_GPIO0_28 0x0 0x202
- >;
- };
-
- pinctrl_iso7816: iso7816grp {
- thead,pins = <
- FM_QSPI1_SCLK 0x1 0x208
- FM_QSPI1_D0_MOSI 0x1 0x238
- FM_QSPI1_D1_MISO 0x1 0x238
- FM_QSPI1_D2_WP 0x1 0x238
- FM_QSPI1_D3_HOLD 0x1 0x238
- >;
- };
-
- pinctrl_volume: volume_grp {
- thead,pins = <
- FM_CLK_OUT_2 0x3 0x208
- >;
- };
- };
-};
-
-&padctrl0_apsys {
- light-evb-padctrl0 {
- /*
- * Pin Configuration Node:
- * Format: <pin_id mux_node config>
- */
- pinctrl_uart0: uart0grp {
- thead,pins = <
- FM_UART0_TXD 0x0 0x202
- FM_UART0_RXD 0x0 0x202
- >;
- };
-
- pinctrl_i2c2: i2c2grp {
- thead,pins = <
- FM_I2C2_SCL 0x0 0x204
- FM_I2C2_SDA 0x0 0x204
- >;
- };
-
- pinctrl_i2c3: i2c3grp {
- thead,pins = <
- FM_I2C3_SCL 0x0 0x204
- FM_I2C3_SDA 0x0 0x204
- >;
- };
-
- pinctrl_spi0: spi0grp {
- thead,pins = <
- FM_SPI_CSN 0x3 0x20a
- FM_SPI_SCLK 0x0 0x20a
- FM_SPI_MISO 0x0 0x23a
- FM_SPI_MOSI 0x0 0x23a
- >;
- };
-
- pinctrl_qspi0: qspi0grp {
- thead,pins = <
- FM_QSPI0_SCLK 0x0 0x20f
- FM_QSPI0_CSN0 0x3 0x20f
- FM_QSPI0_CSN1 0x0 0x20f
- FM_QSPI0_D0_MOSI 0x0 0x23f
- FM_QSPI0_D1_MISO 0x0 0x23f
- FM_QSPI0_D2_WP 0x0 0x23f
- FM_QSPI0_D3_HOLD 0x0 0x23f
- >;
- };
-
- pinctrl_light_i2s0: i2s0grp {
- thead,pins = <
- FM_QSPI0_SCLK 0x2 0x208
- FM_QSPI0_CSN0 0x2 0x238
- FM_QSPI0_CSN1 0x2 0x208
- FM_QSPI0_D0_MOSI 0x2 0x238
- FM_QSPI0_D1_MISO 0x2 0x238
- FM_QSPI0_D2_WP 0x2 0x238
- FM_QSPI0_D3_HOLD 0x2 0x238
- >;
- };
-
- pinctrl_gmac1: gmac1grp {
- thead,pins = <
- FM_GPIO2_18 0x1 0x20f /* GMAC1_TX_CLK */
- FM_GPIO2_19 0x1 0x20f /* GMAC1_RX_CLK */
- FM_GPIO2_20 0x1 0x20f /* GMAC1_TXEN */
- FM_GPIO2_21 0x1 0x20f /* GMAC1_TXD0 */
- FM_GPIO2_22 0x1 0x20f /* GMAC1_TXD1 */
- FM_GPIO2_23 0x1 0x20f /* GMAC1_TXD2 */
- FM_GPIO2_24 0x1 0x20f /* GMAC1_TXD3 */
- FM_GPIO2_25 0x1 0x20f /* GMAC1_RXDV */
- FM_GPIO2_30 0x1 0x20f /* GMAC1_RXD0 */
- FM_GPIO2_31 0x1 0x20f /* GMAC1_RXD1 */
- FM_GPIO3_0 0x1 0x20f /* GMAC1_RXD2 */
- FM_GPIO3_1 0x1 0x20f /* GMAC1_RXD3 */
- >;
- };
-
- pinctrl_sdio0: sdio0grp {
- thead,pins = <
- FM_SDIO0_DETN 0x0 0x202
- >;
- };
-
- pinctrl_pwm: pwmgrp {
- thead,pins = <
- FM_GPIO3_2 0x1 0x20f /* pwm0 */
- FM_GPIO3_3 0x1 0x20f /* pwm1 */
- >;
- };
-
- pinctrl_hdmi: hdmigrp {
- thead,pins = <
- FM_HDMI_SCL 0x0 0x202
- FM_HDMI_SDA 0x0 0x202
- FM_HDMI_CEC 0x0 0x202
- >;
- };
-
- pinctrl_gmac0: gmac0grp {
- thead,pins = <
- FM_GMAC0_TX_CLK 0x0 0x20f /* GMAC0_TX_CLK */
- FM_GMAC0_RX_CLK 0x0 0x20f /* GMAC0_RX_CLK */
- FM_GMAC0_TXEN 0x0 0x20f /* GMAC0_TXEN */
- FM_GMAC0_TXD0 0x0 0x20f /* GMAC0_TXD0 */
- FM_GMAC0_TXD1 0x0 0x20f /* GMAC0_TXD1 */
- FM_GMAC0_TXD2 0x0 0x20f /* GMAC0_TXD2 */
- FM_GMAC0_TXD3 0x0 0x20f /* GMAC0_TXD3 */
- FM_GMAC0_RXDV 0x0 0x20f /* GMAC0_RXDV */
- FM_GMAC0_RXD0 0x0 0x20f /* GMAC0_RXD0 */
- FM_GMAC0_RXD1 0x0 0x20f /* GMAC0_RXD1 */
- FM_GMAC0_RXD2 0x0 0x20f /* GMAC0_RXD2 */
- FM_GMAC0_RXD3 0x0 0x20f /* GMAC0_RXD3 */
- FM_GMAC0_MDC 0x0 0x208 /* GMAC0_MDC */
- FM_GMAC0_MDIO 0x0 0x208 /* GMAC0_MDIO */
- FM_GMAC0_COL 0x3 0x232 /* PHY0_nRST */
- FM_GMAC0_CRS 0x3 0x232 /* PHY0_nINT */
- >;
- };
- };
-};
-
&gmac0 {
phy-mode = "rgmii-id";
rx-clk-delay = <0x00>; /* for RGMII */
projects / platform / kernel / linux-thead.git / commitdiff