drm/i915: Drop has_psr from device info
authorJosé Roberto de Souza <jose.souza@intel.com>
Thu, 5 May 2022 19:35:24 +0000 (12:35 -0700)
committerJosé Roberto de Souza <jose.souza@intel.com>
Fri, 6 May 2022 16:28:21 +0000 (09:28 -0700)
No need to have this parameter in intel_device_info struct
as all platforms with display version 9 or newer has this feature.

As a side effect of the of removal this flag, it will not be printed
in dmesg during driver load anymore and developers will have to rely
on to check the macro and compare with platform being used and IP
versions of it.

Reviewed-by: Matt Roper <matthew.d.roper@intel.com>
Signed-off-by: José Roberto de Souza <jose.souza@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20220505193524.276400-7-jose.souza@intel.com
drivers/gpu/drm/i915/i915_drv.h
drivers/gpu/drm/i915/i915_pci.c
drivers/gpu/drm/i915/intel_device_info.h

index cbe0b19..9d5fab8 100644 (file)
@@ -1297,7 +1297,7 @@ IS_SUBPLATFORM(const struct drm_i915_private *i915,
                                          IS_HASWELL(dev_priv))
 #define HAS_DP_MST(dev_priv)            (HAS_DDI(dev_priv))
 #define HAS_FPGA_DBG_UNCLAIMED(dev_priv) (INTEL_INFO(dev_priv)->display.has_fpga_dbg)
-#define HAS_PSR(dev_priv)               (INTEL_INFO(dev_priv)->display.has_psr)
+#define HAS_PSR(dev_priv)               (DISPLAY_VER(dev_priv) >= 9)
 #define HAS_PSR_HW_TRACKING(dev_priv) \
        (INTEL_INFO(dev_priv)->display.has_psr_hw_tracking)
 #define HAS_PSR2_SEL_FETCH(dev_priv)    (DISPLAY_VER(dev_priv) >= 12)
index ca6461e..1f32024 100644 (file)
@@ -635,7 +635,6 @@ static const struct intel_device_info chv_info = {
        .display.has_dmc = 1, \
        .display.has_hdcp = 1, \
        .display.has_ipc = 1, \
-       .display.has_psr = 1, \
        .display.has_psr_hw_tracking = 1, \
        .dbuf.size = 896 - 4, /* 4 blocks for bypass path allocation */ \
        .dbuf.slice_mask = BIT(DBUF_S1)
@@ -684,7 +683,6 @@ static const struct intel_device_info skl_gt4_info = {
        .display.has_fpga_dbg = 1, \
        .display.fbc_mask = BIT(INTEL_FBC_A), \
        .display.has_hdcp = 1, \
-       .display.has_psr = 1, \
        .display.has_psr_hw_tracking = 1, \
        .has_runtime_pm = 1, \
        .display.has_dmc = 1, \
@@ -936,7 +934,6 @@ static const struct intel_device_info adl_s_info = {
        .display.has_hdcp = 1,                                                  \
        .display.has_hotplug = 1,                                               \
        .display.has_ipc = 1,                                                   \
-       .display.has_psr = 1,                                                   \
        .display.ver = 13,                                                      \
        .display.pipe_mask = BIT(PIPE_A) | BIT(PIPE_B) | BIT(PIPE_C) | BIT(PIPE_D),     \
        .pipe_offsets = {                                                       \
index ffea8bf..8702d1a 100644 (file)
@@ -172,7 +172,6 @@ enum intel_ppgtt_type {
        func(has_ipc); \
        func(has_modular_fia); \
        func(has_overlay); \
-       func(has_psr); \
        func(has_psr_hw_tracking); \
        func(overlay_needs_physical); \
        func(supports_tv);