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perf/x86/intel: Add Rocket Lake CPU support
author
Kan Liang
<kan.liang@linux.intel.com>
Mon, 19 Oct 2020 15:35:25 +0000
(08:35 -0700)
committer
Peter Zijlstra
<peterz@infradead.org>
Thu, 29 Oct 2020 10:00:39 +0000
(11:00 +0100)
From the perspective of Intel PMU, Rocket Lake is the same as Ice Lake
and Tiger Lake. Share the perf code with them.
Signed-off-by: Kan Liang <kan.liang@linux.intel.com>
Signed-off-by: Peter Zijlstra (Intel) <peterz@infradead.org>
Link:
https://lkml.kernel.org/r/20201019153528.13850-1-kan.liang@linux.intel.com
arch/x86/events/intel/core.c
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diff --git
a/arch/x86/events/intel/core.c
b/arch/x86/events/intel/core.c
index 71860986dcb71a0d30dbf7d5ba5e9a397c099f50..4d70c7d6c75098d74a9ea0a9796aac763eefe0f7 100644
(file)
--- a/
arch/x86/events/intel/core.c
+++ b/
arch/x86/events/intel/core.c
@@
-5436,6
+5436,7
@@
__init int intel_pmu_init(void)
case INTEL_FAM6_ICELAKE:
case INTEL_FAM6_TIGERLAKE_L:
case INTEL_FAM6_TIGERLAKE:
+ case INTEL_FAM6_ROCKETLAKE:
x86_pmu.late_ack = true;
memcpy(hw_cache_event_ids, skl_hw_cache_event_ids, sizeof(hw_cache_event_ids));
memcpy(hw_cache_extra_regs, skl_hw_cache_extra_regs, sizeof(hw_cache_extra_regs));