pmu: add kernel config for MDFLD
authorPrabu Renganathan <prabu.renganathan@intel.com>
Mon, 12 Dec 2011 16:19:32 +0000 (08:19 -0800)
committerbuildbot <buildbot@intel.com>
Fri, 16 Dec 2011 17:57:29 +0000 (09:57 -0800)
BZ: 17326

Added config option to enable/disable PMU driver for easy debug
and -Werror to force fix warnings

Change-Id: I7fa241c670f9fc4deade451a3d92750b7fbc9105
Signed-off-by: Prabu Renganathan <prabu.renganathan@intel.com>
Reviewed-on: http://android.intel.com:8080/27242
Reviewed-by: Mansoor, Illyas <illyas.mansoor@intel.com>
Reviewed-by: Mai, Leonard <leonard.mai@intel.com>
Tested-by: Martin, LoicX <loicx.martin@intel.com>
Reviewed-by: buildbot <buildbot@intel.com>
Tested-by: buildbot <buildbot@intel.com>
arch/x86/Kconfig
arch/x86/configs/i386_mfld_defconfig
arch/x86/platform/mfld/Makefile
drivers/idle/intel_idle.c
drivers/pci/mid_pci.c
include/linux/intel_mid_pm.h

index e8ef267..29f0c28 100644 (file)
@@ -1879,6 +1879,14 @@ source "drivers/cpuidle/Kconfig"
 
 source "drivers/idle/Kconfig"
 
+config INTEL_MID_MDFLD_POWER
+        bool "Power Management driver for Intel MDLFD Mid platform"
+        depends on X86_MDFLD && PCI && CPU_IDLE && PM_RUNTIME
+        select PM_SLEEP
+        ---help---
+        Power management enhancement driver on Intel MDFLD Mid Platform.
+        If you don't know what to do here, say N.
+
 endmenu
 
 
index b816a7e..e9e7626 100644 (file)
@@ -501,6 +501,7 @@ CONFIG_CPU_IDLE=y
 CONFIG_CPU_IDLE_GOV_LADDER=y
 CONFIG_CPU_IDLE_GOV_MENU=y
 CONFIG_INTEL_IDLE=y
+CONFIG_INTEL_MID_MDFLD_POWER=y
 
 #
 # Bus options (PCI etc.)
index 7c64d28..8ebaaf4 100644 (file)
@@ -1,2 +1,4 @@
-obj-$(CONFIG_X86_MDFLD)                += pmu.o
+CFLAGS_pmu.o        := -Werror
+
+obj-$(CONFIG_INTEL_MID_MDFLD_POWER)            += pmu.o
 obj-$(CONFIG_X86_MDFLD)                += blackbay_pr2.o
index 052f55c..346b818 100644 (file)
@@ -91,7 +91,7 @@ static struct cpuidle_device __percpu *intel_idle_cpuidle_devices;
 static int intel_idle(struct cpuidle_device *dev, struct cpuidle_state *state);
 static int intel_mid_idle(struct cpuidle_device *dev, struct cpuidle_state *state);
 
-#ifdef CONFIG_X86_MDFLD
+#ifdef CONFIG_INTEL_MID_MDFLD_POWER
 #define C4_STATE_IDX   3
 #define C6_STATE_IDX   4
 #define S0I1_STATE_IDX  5
@@ -353,7 +353,7 @@ static struct cpuidle_state mrst_cstates[MWAIT_MAX_NUM_CSTATES] = {
 
 #endif
 
-#ifdef CONFIG_X86_MDFLD
+#ifdef CONFIG_INTEL_MID_MDFLD_POWER
 static int soc_s0ix_idle(struct cpuidle_device *dev,
                        struct cpuidle_state *state)
 {
index 6527116..91d2b5e 100644 (file)
@@ -77,7 +77,7 @@ static int __init mid_pci_init(void)
                pci_set_platform_pm(&mid_pci_platform_pm);
                break;
 #endif
-#ifdef CONFIG_X86_MDFLD
+#ifdef CONFIG_INTEL_MID_MDFLD_POWER
        case 0x27:
                mid_pci_platform_pm.set_state = pmu_pci_set_power_state;
                mid_pci_platform_pm.choose_state = pmu_pci_choose_state;
index ab944f8..9a25e45 100644 (file)
@@ -59,7 +59,7 @@
 #define CSTATE_EXIT_LATENCY_S0i1 1040
 #define CSTATE_EXIT_LATENCY_S0i3 5000
 
-#ifdef CONFIG_X86_MDFLD
+#ifdef CONFIG_INTEL_MID_MDFLD_POWER
 
 #define PMU1_MAX_PENWELL_DEVS   8
 #define PMU2_MAX_PENWELL_DEVS   55
@@ -130,6 +130,7 @@ static inline int pmu_nc_set_power_state
        (int islands, int state_type, int reg_type) { return 0; }
 
 static inline void pmu_set_s0ix_complete(void) { return; }
+static inline void mfld_shutdown(void) { return; }
 #endif /* #ifdef CONFIG_X86_MDFLD */
 
 #endif /* #ifndef INTEL_MID_PM_H */