.links = { SC8280XP_SLAVE_A2NOC_SNOC },
};
-static struct qcom_icc_node ipa_core_master = {
- .name = "ipa_core_master",
- .id = SC8280XP_MASTER_IPA_CORE,
- .channels = 1,
- .buswidth = 8,
- .num_links = 1,
- .links = { SC8280XP_SLAVE_IPA_CORE },
-};
-
static struct qcom_icc_node qup0_core_master = {
.name = "qup0_core_master",
.id = SC8280XP_MASTER_QUP_CORE_0,
.buswidth = 4,
};
-static struct qcom_icc_node ipa_core_slave = {
- .name = "ipa_core_slave",
- .id = SC8280XP_SLAVE_IPA_CORE,
- .channels = 1,
- .buswidth = 8,
-};
-
static struct qcom_icc_node qup0_core_slave = {
.name = "qup0_core_slave",
.id = SC8280XP_SLAVE_QUP_CORE_0,
},
};
-static struct qcom_icc_bcm bcm_ip0 = {
- .name = "IP0",
- .num_nodes = 1,
- .nodes = { &ipa_core_slave },
-};
-
static struct qcom_icc_bcm bcm_mc0 = {
.name = "MC0",
.keepalive = true,
};
static struct qcom_icc_bcm * const clk_virt_bcms[] = {
- &bcm_ip0,
&bcm_qup0,
&bcm_qup1,
&bcm_qup2,
};
static struct qcom_icc_node * const clk_virt_nodes[] = {
- [MASTER_IPA_CORE] = &ipa_core_master,
[MASTER_QUP_CORE_0] = &qup0_core_master,
[MASTER_QUP_CORE_1] = &qup1_core_master,
[MASTER_QUP_CORE_2] = &qup2_core_master,
- [SLAVE_IPA_CORE] = &ipa_core_slave,
[SLAVE_QUP_CORE_0] = &qup0_core_slave,
[SLAVE_QUP_CORE_1] = &qup1_core_slave,
[SLAVE_QUP_CORE_2] = &qup2_core_slave,
#define SC8280XP_MASTER_PCIE_TCU 1
#define SC8280XP_MASTER_SYS_TCU 2
#define SC8280XP_MASTER_APPSS_PROC 3
-#define SC8280XP_MASTER_IPA_CORE 4
+/* 4 was used by SLAVE_IPA_CORE, now represented as RPMh clock */
#define SC8280XP_MASTER_LLCC 5
#define SC8280XP_MASTER_CNOC_LPASS_AG_NOC 6
#define SC8280XP_MASTER_CDSP_NOC_CFG 7
#define SC8280XP_MASTER_USB4_0 75
#define SC8280XP_MASTER_USB4_1 76
#define SC8280XP_SLAVE_EBI1 512
-#define SC8280XP_SLAVE_IPA_CORE 513
+/* 513 was used by SLAVE_IPA_CORE, now represented as RPMh clock */
#define SC8280XP_SLAVE_AHB2PHY_0 514
#define SC8280XP_SLAVE_AHB2PHY_1 515
#define SC8280XP_SLAVE_AHB2PHY_2 516