re PR tree-optimization/15256 ([tree-ssa] Optimize manual bitfield manipilation.)

2016-06-29  Richard Biener  <rguenther@suse.de>

	PR middle-end/15256
	* gcc.dg/tree-ssa/forwprop-34.c: New testcase.

From-SVN: r237852

diff --git a/gcc/testsuite/ChangeLog b/gcc/testsuite/ChangeLog
index c8f96a9..0c931e0 100644 (file)
--- a/gcc/testsuite/ChangeLog
+++ b/gcc/testsuite/ChangeLog
@@ -1,3 +1,8 @@
+2016-06-29  Richard Biener  <rguenther@suse.de>
+
+       PR middle-end/15256
+       * gcc.dg/tree-ssa/forwprop-34.c: New testcase.
+
 2016-06-29  Matthew Wahab  <matthew.wahab@arm.com>
 
        * gcc.target/arm/aapcs/neon-vect10.c: Require

diff --git a/gcc/testsuite/gcc.dg/tree-ssa/forwprop-34.c b/gcc/testsuite/gcc.dg/tree-ssa/forwprop-34.c
new file mode 100644 (file)
index 0000000..9aadce6
--- /dev/null
+++ b/gcc/testsuite/gcc.dg/tree-ssa/forwprop-34.c
@@ -0,0 +1,15 @@
+/* { dg-do compile } */
+/* { dg-options "-O -fdump-tree-cddce1" } */
+
+unsigned int
+foo (unsigned int eax)
+{
+  unsigned int edx = eax & 1;
+  edx ^= 1;
+  eax &= -2;
+  eax |= edx;
+  return eax;
+}
+
+/* { dg-final { scan-tree-dump-times " = " 1 "cddce1" } } */
+/* { dg-final { scan-tree-dump " = eax_\[0-9\]+\\(D\\) \\^ 1;" "cddce1" } } */