drm/vc4: SCALER_DISPBKGND_AUTOHS is only valid on HVS4
authorDave Stevenson <dave.stevenson@raspberrypi.com>
Thu, 11 Aug 2022 14:49:16 +0000 (15:49 +0100)
committerPhil Elwell <8911409+pelwell@users.noreply.github.com>
Thu, 1 Sep 2022 16:58:41 +0000 (17:58 +0100)
The bit used for SCALER_DISPBKGND_AUTOHS in SCALER_DISPBKGNDX
has been repurposed on HVS5 to configure whether a display can
win back-to-back arbitration wins for the COB.

This is not desirable, therefore only select this bit on HVS4,
and explicitly clear it on HVS5.

Signed-off-by: Dave Stevenson <dave.stevenson@raspberrypi.com>
drivers/gpu/drm/vc4/vc4_hvs.c
drivers/gpu/drm/vc4/vc4_regs.h

index 4e67dbf..5667855 100644 (file)
@@ -485,23 +485,26 @@ static int vc4_hvs_init_channel(struct vc4_hvs *hvs, struct drm_crtc *crtc,
         * mode.
         */
        dispctrl = SCALER_DISPCTRLX_ENABLE;
+       dispbkgndx = HVS_READ(SCALER_DISPBKGNDX(chan));
 
-       if (!vc4->is_vc5)
+       if (!vc4->is_vc5) {
                dispctrl |= VC4_SET_FIELD(mode->hdisplay,
                                          SCALER_DISPCTRLX_WIDTH) |
                            VC4_SET_FIELD(mode->vdisplay,
                                          SCALER_DISPCTRLX_HEIGHT) |
                            (oneshot ? SCALER_DISPCTRLX_ONESHOT : 0);
-       else
+               dispbkgndx |= SCALER_DISPBKGND_AUTOHS;
+       } else {
                dispctrl |= VC4_SET_FIELD(mode->hdisplay,
                                          SCALER5_DISPCTRLX_WIDTH) |
                            VC4_SET_FIELD(mode->vdisplay,
                                          SCALER5_DISPCTRLX_HEIGHT) |
                            (oneshot ? SCALER5_DISPCTRLX_ONESHOT : 0);
+               dispbkgndx &= ~SCALER5_DISPBKGND_BCK2BCK;
+       }
 
        HVS_WRITE(SCALER_DISPCTRLX(chan), dispctrl);
 
-       dispbkgndx = HVS_READ(SCALER_DISPBKGNDX(chan));
        dispbkgndx &= ~SCALER_DISPBKGND_GAMMA;
        dispbkgndx &= ~SCALER_DISPBKGND_INTERLACE;
 
@@ -510,7 +513,6 @@ static int vc4_hvs_init_channel(struct vc4_hvs *hvs, struct drm_crtc *crtc,
                dispbkgndx |= SCALER_DISPBKGND_GAMMA;
 
        HVS_WRITE(SCALER_DISPBKGNDX(chan), dispbkgndx |
-                 SCALER_DISPBKGND_AUTOHS |
                  (interlace ? SCALER_DISPBKGND_INTERLACE : 0));
 
        /* Reload the LUT, since the SRAMs would have been disabled if
index 0b61f09..eeeeb30 100644 (file)
 
 #define SCALER_DISPBKGND0                       0x00000044
 # define SCALER_DISPBKGND_AUTOHS               BIT(31)
+# define SCALER5_DISPBKGND_BCK2BCK             BIT(31)
 # define SCALER_DISPBKGND_INTERLACE            BIT(30)
 # define SCALER_DISPBKGND_GAMMA                        BIT(29)
 # define SCALER_DISPBKGND_TESTMODE_MASK                VC4_MASK(28, 25)