#include "vc4_drv.h"
#include "vc4_regs.h"
+#define HVS_FIFO_LATENCY_PIX 6
+
#define CRTC_WRITE(offset, val) writel(val, vc4_crtc->regs + (offset))
#define CRTC_READ(offset) readl(vc4_crtc->regs + (offset))
vc4_crtc_lut_load(crtc);
}
+
static u32 vc4_get_fifo_full_level(u32 format)
{
static const u32 fifo_len_bytes = 64;
- static const u32 hvs_latency_pix = 6;
switch (format) {
case PV_CONTROL_FORMAT_DSIV_16:
case PV_CONTROL_FORMAT_DSIC_16:
- return fifo_len_bytes - 2 * hvs_latency_pix;
+ return fifo_len_bytes - 2 * HVS_FIFO_LATENCY_PIX;
case PV_CONTROL_FORMAT_DSIV_18:
return fifo_len_bytes - 14;
case PV_CONTROL_FORMAT_24:
case PV_CONTROL_FORMAT_DSIV_24:
default:
- return fifo_len_bytes - 3 * hvs_latency_pix;
+ return fifo_len_bytes - 3 * HVS_FIFO_LATENCY_PIX;
}
}