Revert "drm/i915/uapi: expose GTT alignment"
authorMatthew Auld <matthew.auld@intel.com>
Mon, 24 Oct 2022 10:19:46 +0000 (11:19 +0100)
committerMatthew Auld <matthew.auld@intel.com>
Thu, 27 Oct 2022 08:21:56 +0000 (09:21 +0100)
The process for merging uAPI is to have UMD side ready and reviewed and
merged before merging. Revert for now until that is ready.

This reverts commit d54576a074a29d4901d0a693cd84e1a89057f694.

Reported-by: Joonas Lahtinen <joonas.lahtinen@linux.intel.com>
Signed-off-by: Matthew Auld <matthew.auld@intel.com>
Cc: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Cc: Michal Mrozek <michal.mrozek@intel.com>
Cc: Thomas Hellström <thomas.hellstrom@linux.intel.com>
Cc: Stuart Summers <stuart.summers@intel.com>
Cc: Jordan Justen <jordan.l.justen@intel.com>
Cc: Yang A Shi <yang.a.shi@intel.com>
Cc: Nirmoy Das <nirmoy.das@intel.com>
Cc: Niranjana Vishwanathapura <niranjana.vishwanathapura@intel.com>
Reviewed-by: Nirmoy Das <nirmoy.das@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20221024101946.28974-1-matthew.auld@intel.com
drivers/gpu/drm/i915/i915_query.c
include/uapi/drm/i915_drm.h

index 111377f..6ec9c9f 100644 (file)
@@ -498,7 +498,6 @@ static int query_memregion_info(struct drm_i915_private *i915,
                info.region.memory_class = mr->type;
                info.region.memory_instance = mr->instance;
                info.probed_size = mr->total;
-               info.gtt_alignment = mr->min_page_size;
 
                if (mr->type == INTEL_MEMORY_LOCAL)
                        info.probed_cpu_visible_size = mr->io_size;
index 2e61310..08d69e3 100644 (file)
@@ -3346,33 +3346,8 @@ struct drm_i915_memory_region_info {
        /** @region: The class:instance pair encoding */
        struct drm_i915_gem_memory_class_instance region;
 
-       union {
-               /** @rsvd0: MBZ */
-               __u32 rsvd0;
-               /**
-                * @gtt_alignment:
-                *
-                * The minimum required GTT alignment for this type of memory.
-                * When allocating a GTT address it must be aligned to this
-                * value or larger. On some platforms the kernel might opt to
-                * using 64K pages for I915_MEMORY_CLASS_DEVICE, where 64K GTT
-                * pages can then be used if we also use 64K GTT alignment.
-                *
-                * NOTE: If this is zero then this must be an older
-                * kernel which lacks support for this field.
-                *
-                * Side note: For larger objects (especially for
-                * I915_MEMORY_CLASS_DEVICE), like 2M+ in size, userspace should
-                * consider potentially bumping the GTT alignment to say 2M,
-                * which could potentially increase the likelihood of the kernel
-                * being able to utilise 2M GTT pages underneath, if the layout
-                * of the physical pages allows it.  On some configurations we
-                * can then also use a more efficient page-table layout, if we
-                * can't use the more desirable 2M GTT page, so long as we know
-                * that the entire page-table will be used by this object.
-                */
-               __u32 gtt_alignment;
-       };
+       /** @rsvd0: MBZ */
+       __u32 rsvd0;
 
        /**
         * @probed_size: Memory probed by the driver