drm/amd/display: Reset OUTBOX0 r/w pointer on DMUB reset
authorCruise Hung <Cruise.Hung@amd.com>
Fri, 13 May 2022 01:16:42 +0000 (09:16 +0800)
committerAlex Deucher <alexander.deucher@amd.com>
Fri, 21 Apr 2023 12:49:15 +0000 (08:49 -0400)
[Why & How]
We missed resetting OUTBOX0 mailbox r/w pointer on DMUB reset.
Fix it.

Fixes: 6ecf9773a503 ("drm/amd/display: Fix DMUB outbox trace in S4 (#4465)")
Signed-off-by: Cruise Hung <Cruise.Hung@amd.com>
Acked-by: Aurabindo Pillai <aurabindo.pillai@amd.com>
Tested-by: Daniel Wheeler <daniel.wheeler@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
drivers/gpu/drm/amd/display/dmub/src/dmub_dcn32.c

index 568a270..b45ac31 100644 (file)
@@ -126,6 +126,8 @@ void dmub_dcn32_reset(struct dmub_srv *dmub)
        REG_WRITE(DMCUB_INBOX1_WPTR, 0);
        REG_WRITE(DMCUB_OUTBOX1_RPTR, 0);
        REG_WRITE(DMCUB_OUTBOX1_WPTR, 0);
+       REG_WRITE(DMCUB_OUTBOX0_RPTR, 0);
+       REG_WRITE(DMCUB_OUTBOX0_WPTR, 0);
        REG_WRITE(DMCUB_SCRATCH0, 0);
 
        /* Clear the GPINT command manually so we don't reset again. */