#define SIO_F71889_ID 0x0909 /* F71889 chipset ID */
#define SIO_F71889A_ID 0x1005 /* F71889A chipset ID */
#define SIO_F81866_ID 0x1010 /* F81866 chipset ID */
+#define SIO_F81804_ID 0x1502 /* F81804 chipset ID, same for f81966 */
-enum chips { f71869, f71869a, f71882fg, f71889a, f71889f, f81866 };
+
+enum chips { f71869, f71869a, f71882fg, f71889a, f71889f, f81866, f81804 };
static const char * const f7188x_names[] = {
"f71869",
"f71889a",
"f71889f",
"f81866",
+ "f81804",
};
struct f7188x_sio {
F7188X_GPIO_BANK(80, 8, 0x88),
};
+
+static struct f7188x_gpio_bank f81804_gpio_bank[] = {
+ F7188X_GPIO_BANK(0, 8, 0xF0),
+ F7188X_GPIO_BANK(10, 8, 0xE0),
+ F7188X_GPIO_BANK(20, 8, 0xD0),
+ F7188X_GPIO_BANK(50, 8, 0xA0),
+ F7188X_GPIO_BANK(60, 8, 0x90),
+ F7188X_GPIO_BANK(70, 8, 0x80),
+ F7188X_GPIO_BANK(90, 8, 0x98),
+};
+
+
static int f7188x_gpio_get_direction(struct gpio_chip *chip, unsigned offset)
{
int err;
data->nr_bank = ARRAY_SIZE(f81866_gpio_bank);
data->bank = f81866_gpio_bank;
break;
+ case f81804:
+ data->nr_bank = ARRAY_SIZE(f81804_gpio_bank);
+ data->bank = f81804_gpio_bank;
+ break;
default:
return -ENODEV;
}
case SIO_F81866_ID:
sio->type = f81866;
break;
+ case SIO_F81804_ID:
+ sio->type = f81804;
+ break;
default:
pr_info(DRVNAME ": Unsupported Fintek device 0x%04x\n", devid);
goto err;