ARM: mx28evk: set a initial clock rate for saif
authorDong Aisheng <b29396@freescale.com>
Tue, 22 Nov 2011 15:54:25 +0000 (23:54 +0800)
committerShawn Guo <shawn.guo@linaro.org>
Fri, 2 Dec 2011 05:57:16 +0000 (13:57 +0800)
Signed-off-by: Dong Aisheng <b29396@freescale.com>
Acked-by: Marek Vasut <marek.vasut@gmail.com>
Cc: Sascha Hauer <s.hauer@pengutronix.de>
Cc: Wolfram Sang <w.sang@pengutronix.de>
Cc: Uwe Kleine-König <u.kleine-koenig@pengutronix.de>
Cc: Mark Brown <broonie@opensource.wolfsonmicro.com>
Cc: Liam Girdwood <lrg@ti.com>
Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
arch/arm/mach-mxs/clock-mx28.c

index 60c189a..df0ad3c 100644 (file)
@@ -814,6 +814,15 @@ int __init mx28_clocks_init(void)
        clk_set_parent(&saif0_clk, &pll0_clk);
        clk_set_parent(&saif1_clk, &pll0_clk);
 
+       /*
+        * Set an initial clock rate for the saif internal logic to work
+        * properly. This is important when working in EXTMASTER mode that
+        * uses the other saif's BITCLK&LRCLK but it still needs a basic
+        * clock which should be fast enough for the internal logic.
+        */
+       clk_set_rate(&saif0_clk, 24000000);
+       clk_set_rate(&saif1_clk, 24000000);
+
        clkdev_add_table(lookups, ARRAY_SIZE(lookups));
 
        mxs_timer_init(&clk32k_clk, MX28_INT_TIMER0);