soc: qcom: geni-se: add GP_LENGTH/IRQ_EN_SET/IRQ_EN_CLEAR registers
authorDouglas Anderson <dianders@chromium.org>
Fri, 6 Sep 2024 13:13:31 +0000 (15:13 +0200)
committerGreg Kroah-Hartman <gregkh@linuxfoundation.org>
Wed, 11 Sep 2024 13:44:45 +0000 (15:44 +0200)
For UART devices the M_GP_LENGTH is the TX word count. For other
devices this is the transaction word count.

For UART devices the S_GP_LENGTH is the RX word count.

The IRQ_EN set/clear registers allow you to set or clear bits in the
IRQ_EN register without needing a read-modify-write.

Acked-by: Bjorn Andersson <andersson@kernel.org>
Signed-off-by: Douglas Anderson <dianders@chromium.org>
Link: https://lore.kernel.org/r/20240610152420.v4.1.Ife7ced506aef1be3158712aa3ff34a006b973559@changeid
Tested-by: NĂ­colas F. R. A. Prado <nfraprado@collabora.com>
Signed-off-by: Johan Hovold <johan+linaro@kernel.org>
Link: https://lore.kernel.org/r/20240906131336.23625-4-johan+linaro@kernel.org
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
include/linux/soc/qcom/geni-se.h

index 0f038a1a033099bfeaf094fd3742f59a63a3f076..c3bca9c0bf2cf52f96243b2e033213adb31adf95 100644 (file)
@@ -88,11 +88,15 @@ struct geni_se {
 #define SE_GENI_M_IRQ_STATUS           0x610
 #define SE_GENI_M_IRQ_EN               0x614
 #define SE_GENI_M_IRQ_CLEAR            0x618
+#define SE_GENI_M_IRQ_EN_SET           0x61c
+#define SE_GENI_M_IRQ_EN_CLEAR         0x620
 #define SE_GENI_S_CMD0                 0x630
 #define SE_GENI_S_CMD_CTRL_REG         0x634
 #define SE_GENI_S_IRQ_STATUS           0x640
 #define SE_GENI_S_IRQ_EN               0x644
 #define SE_GENI_S_IRQ_CLEAR            0x648
+#define SE_GENI_S_IRQ_EN_SET           0x64c
+#define SE_GENI_S_IRQ_EN_CLEAR         0x650
 #define SE_GENI_TX_FIFOn               0x700
 #define SE_GENI_RX_FIFOn               0x780
 #define SE_GENI_TX_FIFO_STATUS         0x800
@@ -101,6 +105,8 @@ struct geni_se {
 #define SE_GENI_RX_WATERMARK_REG       0x810
 #define SE_GENI_RX_RFR_WATERMARK_REG   0x814
 #define SE_GENI_IOS                    0x908
+#define SE_GENI_M_GP_LENGTH            0x910
+#define SE_GENI_S_GP_LENGTH            0x914
 #define SE_DMA_TX_IRQ_STAT             0xc40
 #define SE_DMA_TX_IRQ_CLR              0xc44
 #define SE_DMA_TX_FSM_RST              0xc58
@@ -234,6 +240,9 @@ struct geni_se {
 #define IO2_DATA_IN                    BIT(1)
 #define RX_DATA_IN                     BIT(0)
 
+/* SE_GENI_M_GP_LENGTH and SE_GENI_S_GP_LENGTH fields */
+#define GP_LENGTH                      GENMASK(31, 0)
+
 /* SE_DMA_TX_IRQ_STAT Register fields */
 #define TX_DMA_DONE                    BIT(0)
 #define TX_EOT                         BIT(1)