radeonsi: use shared emit_umsb helper.
authorDave Airlie <airlied@redhat.com>
Thu, 16 Feb 2017 03:54:19 +0000 (03:54 +0000)
committerDave Airlie <airlied@redhat.com>
Thu, 16 Feb 2017 22:57:16 +0000 (22:57 +0000)
Reviewed-by: Edward O'Callaghan <funfunctor@folklore1984.net>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Signed-off-by: Dave Airlie <airlied@redhat.com>
src/gallium/drivers/radeonsi/si_shader_tgsi_alu.c

index 879deb1..e03d053 100644 (file)
@@ -555,30 +555,10 @@ static void emit_umsb(const struct lp_build_tgsi_action *action,
                      struct lp_build_tgsi_context *bld_base,
                      struct lp_build_emit_data *emit_data)
 {
-       struct gallivm_state *gallivm = bld_base->base.gallivm;
-       LLVMBuilderRef builder = gallivm->builder;
-       LLVMValueRef args[2] = {
-               emit_data->args[0],
-               /* Don't generate code for handling zero: */
-               LLVMConstInt(LLVMInt1TypeInContext(gallivm->context), 1, 0)
-       };
-
-       LLVMValueRef msb =
-               lp_build_intrinsic(builder, "llvm.ctlz.i32",
-                               emit_data->dst_type, args, ARRAY_SIZE(args),
-                               LP_FUNC_ATTR_READNONE);
-
-       /* The HW returns the last bit index from MSB, but TGSI wants
-        * the index from LSB. Invert it by doing "31 - msb". */
-       msb = LLVMBuildSub(builder, lp_build_const_int32(gallivm, 31),
-                          msb, "");
+       struct si_shader_context *ctx = si_shader_context(bld_base);
 
-       /* Check for zero: */
        emit_data->output[emit_data->chan] =
-               LLVMBuildSelect(builder,
-                               LLVMBuildICmp(builder, LLVMIntEQ, args[0],
-                                             bld_base->uint_bld.zero, ""),
-                               lp_build_const_int32(gallivm, -1), msb, "");
+               ac_emit_umsb(&ctx->ac, emit_data->args[0], emit_data->dst_type);
 }
 
 /* Find the last bit opposite of the sign bit. */