}
}
+static PCIIDEState *pci_from_bm(BMDMAState *bm)
+{
+ if (bm->unit == 0) {
+ return container_of(bm, PCIIDEState, bmdma[0]);
+ } else {
+ return container_of(bm, PCIIDEState, bmdma[1]);
+ }
+}
+
static uint32_t bmdma_readb(void *opaque, uint32_t addr)
{
BMDMAState *bm = opaque;
- PCIIDEState *pci_dev;
+ PCIIDEState *pci_dev = pci_from_bm(bm);
uint32_t val;
switch(addr & 3) {
val = bm->cmd;
break;
case 1:
- pci_dev = bm->pci_dev;
val = pci_dev->dev.config[MRDMODE];
break;
case 2:
val = bm->status;
break;
case 3:
- pci_dev = bm->pci_dev;
if (bm == &pci_dev->bmdma[0]) {
val = pci_dev->dev.config[UDIDETCR0];
} else {
static void bmdma_writeb(void *opaque, uint32_t addr, uint32_t val)
{
BMDMAState *bm = opaque;
- PCIIDEState *pci_dev;
+ PCIIDEState *pci_dev = pci_from_bm(bm);
#ifdef DEBUG_IDE
printf("bmdma: writeb 0x%02x : 0x%02x\n", addr, val);
#endif
switch(addr & 3) {
case 1:
- pci_dev = bm->pci_dev;
pci_dev->dev.config[MRDMODE] =
(pci_dev->dev.config[MRDMODE] & ~0x30) | (val & 0x30);
cmd646_update_irq(pci_dev);
bm->status = (val & 0x60) | (bm->status & 1) | (bm->status & ~val & 0x06);
break;
case 3:
- pci_dev = bm->pci_dev;
if (bm == &pci_dev->bmdma[0])
pci_dev->dev.config[UDIDETCR0] = val;
else