arm64: zynqmp: Move fixed clock to / for kv260
authorMichal Simek <michal.simek@amd.com>
Thu, 30 Nov 2023 09:59:15 +0000 (10:59 +0100)
committerGreg Kroah-Hartman <gregkh@linuxfoundation.org>
Mon, 5 Feb 2024 20:14:22 +0000 (20:14 +0000)
[ Upstream commit 6a10a19a6bd2fd8d27a510678bf87bd9408f51d8 ]

fixed clock nodes can't be on the bus because they are missing reg
property. That's why move them to root.
And because it is root it is good to have it as the first node in a file.

Signed-off-by: Michal Simek <michal.simek@amd.com>
Signed-off-by: Sasha Levin <sashal@kernel.org>
arch/arm64/boot/dts/xilinx/zynqmp-sck-kv-g-revA.dtso
arch/arm64/boot/dts/xilinx/zynqmp-sck-kv-g-revB.dtso

index ae1b9b2bdbee27fdf649f4ee69b75d3ddb6a9573..dee2387392902fbd4341ee92ab829d1f9a9af071 100644 (file)
 /dts-v1/;
 /plugin/;
 
-&i2c1 { /* I2C_SCK C23/C24 - MIO from SOM */
-       #address-cells = <1>;
-       #size-cells = <0>;
-       pinctrl-names = "default", "gpio";
-       pinctrl-0 = <&pinctrl_i2c1_default>;
-       pinctrl-1 = <&pinctrl_i2c1_gpio>;
-       scl-gpios = <&gpio 24 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>;
-       sda-gpios = <&gpio 25 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>;
-
-       /* u14 - 0x40 - ina260 */
-       /* u27 - 0xe0 - STDP4320 DP/HDMI splitter */
-};
-
-&amba {
+&{/} {
        si5332_0: si5332_0 { /* u17 */
                compatible = "fixed-clock";
                #clock-cells = <0>;
        };
 };
 
+&i2c1 { /* I2C_SCK C23/C24 - MIO from SOM */
+       #address-cells = <1>;
+       #size-cells = <0>;
+       pinctrl-names = "default", "gpio";
+       pinctrl-0 = <&pinctrl_i2c1_default>;
+       pinctrl-1 = <&pinctrl_i2c1_gpio>;
+       scl-gpios = <&gpio 24 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>;
+       sda-gpios = <&gpio 25 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>;
+
+       /* u14 - 0x40 - ina260 */
+       /* u27 - 0xe0 - STDP4320 DP/HDMI splitter */
+};
+
 /* DP/USB 3.0 and SATA */
 &psgtr {
        status = "okay";
index b59e48be6465a5e0243d48736c10d17c7d918542..73c5cb156cafc63c431cc52d8e6d7d001b8e71e4 100644 (file)
 /dts-v1/;
 /plugin/;
 
-&i2c1 { /* I2C_SCK C23/C24 - MIO from SOM */
-       #address-cells = <1>;
-       #size-cells = <0>;
-       pinctrl-names = "default", "gpio";
-       pinctrl-0 = <&pinctrl_i2c1_default>;
-       pinctrl-1 = <&pinctrl_i2c1_gpio>;
-       scl-gpios = <&gpio 24 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>;
-       sda-gpios = <&gpio 25 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>;
-
-       /* u14 - 0x40 - ina260 */
-       /* u43 - 0x2d - usb5744 */
-       /* u27 - 0xe0 - STDP4320 DP/HDMI splitter */
-};
-
-&amba {
+&{/} {
        si5332_0: si5332_0 { /* u17 */
                compatible = "fixed-clock";
                #clock-cells = <0>;
        };
 };
 
+&i2c1 { /* I2C_SCK C23/C24 - MIO from SOM */
+       #address-cells = <1>;
+       #size-cells = <0>;
+       pinctrl-names = "default", "gpio";
+       pinctrl-0 = <&pinctrl_i2c1_default>;
+       pinctrl-1 = <&pinctrl_i2c1_gpio>;
+       scl-gpios = <&gpio 24 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>;
+       sda-gpios = <&gpio 25 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>;
+
+       /* u14 - 0x40 - ina260 */
+       /* u43 - 0x2d - usb5744 */
+       /* u27 - 0xe0 - STDP4320 DP/HDMI splitter */
+};
+
 /* DP/USB 3.0 */
 &psgtr {
        status = "okay";