clk: renesas: r8a779g0: Add PWM clock
authorGeert Uytterhoeven <geert+renesas@glider.be>
Fri, 7 Oct 2022 13:10:03 +0000 (15:10 +0200)
committerGeert Uytterhoeven <geert+renesas@glider.be>
Wed, 26 Oct 2022 10:38:01 +0000 (12:38 +0200)
Add the module clock used by the PWM timers on the Renesas R-Car V4H
(R8A779G0) SoC.

Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Reviewed-by: Wolfram Sang <wsa+renesas@sang-engineering.com>
Acked-by: Stephen Boyd <sboyd@kernel.org>
Link: https://lore.kernel.org/r/a33d0e51c2fe8a0e6c89f3fd92db7c4bf5c33074.1665147497.git.geert+renesas@glider.be
drivers/clk/renesas/r8a779g0-cpg-mssr.c

index c8c143c..1215b6f 100644 (file)
@@ -175,6 +175,7 @@ static const struct mssr_mod_clk r8a779g0_mod_clks[] __initconst = {
        DEF_MOD("msi3",         621,    R8A779G0_CLK_MSO),
        DEF_MOD("msi4",         622,    R8A779G0_CLK_MSO),
        DEF_MOD("msi5",         623,    R8A779G0_CLK_MSO),
+       DEF_MOD("pwm",          628,    R8A779G0_CLK_SASYNCPERD4),
        DEF_MOD("scif0",        702,    R8A779G0_CLK_SASYNCPERD4),
        DEF_MOD("scif1",        703,    R8A779G0_CLK_SASYNCPERD4),
        DEF_MOD("scif3",        704,    R8A779G0_CLK_SASYNCPERD4),