vpp: config the vd1 canvas1 correctly when 3D enabled [1/1]

PD#TV-3086

Problem:
3D display abnormal. The vd1 canvas1 was incorrect.

Solution:
When enabled 3D function, config vd1 canvas1 correctly

Verify:
x301

Change-Id: I201cda2f33badf1af54ab4f177a17f761c7cea8d
Signed-off-by: Brian Zhu <brian.zhu@amlogic.com>

diff --git a/drivers/amlogic/media/video_sink/video.c b/drivers/amlogic/media/video_sink/video.c
index 443591c..2c0d699 100644 (file)
--- a/drivers/amlogic/media/video_sink/video.c
+++ b/drivers/amlogic/media/video_sink/video.c
@@ -3737,7 +3737,7 @@ static void vsync_toggle_frame(struct vframe_s *vf)
                                vf->plane_num,
                                &disp_canvas_index[rdma_canvas_id][0]);
                }
-               if (is_mvc) {
+               if (is_mvc || process_3d_type) {
                        if (vf->canvas1Addr != (u32)-1) {
                                canvas_copy(vf->canvas1Addr & 0xff,
                                        disp_canvas_index[rdma_canvas_id][3]);
@@ -3778,18 +3778,22 @@ static void vsync_toggle_frame(struct vframe_s *vf)
                                        disp_canvas[rdma_canvas_id][0]);
                }
                if (cur_frame_par
-               && (process_3d_type & MODE_3D_ENABLE)
-               && (process_3d_type & MODE_3D_TO_2D_R)
-               && (cur_frame_par->vpp_2pic_mode == VPP_SELECT_PIC1)
-               && is_mvc) {
+                       && (process_3d_type & MODE_3D_ENABLE)
+                       && (process_3d_type & MODE_3D_TO_2D_R)
+                       && (cur_frame_par->vpp_2pic_mode
+                       == VPP_SELECT_PIC1)) {
                        VSYNC_WR_MPEG_REG(VD1_IF0_CANVAS0 + cur_dev->viu_off,
-                                         disp_canvas[rdma_canvas_id][1]);
+                                 disp_canvas[rdma_canvas_id][1]);
                        VSYNC_WR_MPEG_REG(VD1_IF0_CANVAS1 + cur_dev->viu_off,
-                                         disp_canvas[rdma_canvas_id][1]);
-                       VSYNC_WR_MPEG_REG(VD2_IF0_CANVAS0 + cur_dev->viu_off,
-                                         disp_canvas[rdma_canvas_id][1]);
-                       VSYNC_WR_MPEG_REG(VD2_IF0_CANVAS1 + cur_dev->viu_off,
-                                         disp_canvas[rdma_canvas_id][1]);
+                                 disp_canvas[rdma_canvas_id][1]);
+                       if (is_mvc) {
+                               VSYNC_WR_MPEG_REG(
+                                       VD2_IF0_CANVAS0 + cur_dev->viu_off,
+                                       disp_canvas[rdma_canvas_id][1]);
+                               VSYNC_WR_MPEG_REG(
+                                       VD2_IF0_CANVAS1 + cur_dev->viu_off,
+                                       disp_canvas[rdma_canvas_id][1]);
+                       }
                }
                next_rdma_canvas_id = rdma_canvas_id ? 0 : 1;
 #else
@@ -3798,7 +3802,7 @@ static void vsync_toggle_frame(struct vframe_s *vf)
                            disp_canvas_index[1]);
                canvas_copy((vf->canvas0Addr >> 16) & 0xff,
                            disp_canvas_index[2]);
-               if (is_mvc) {
+               if (is_mvc || process_3d_type) {
                        canvas_copy(vf->canvas1Addr & 0xff,
                                disp_canvas_index[3]);
                        canvas_copy((vf->canvas1Addr >> 8) & 0xff,