drm: Replace pitch with pitches[] in drm_framebuffer

Otherwise each driver would need to keep the information inside
their own framebuffer object structure. Also add offsets[]. BOs
on the other hand are driver specific, so those can be kept in
driver specific structures.

Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Acked-by: Pauli Nieminen <pauli.nieminen@linux.intel.com>
Reviewed-by: Jani Nikula <jani.nikula@intel.com>
Signed-off-by: Kirill A. Shutemov <kirill.shutemov@linux.intel.com>

diff --git a/drivers/gpu/drm/drm_crtc.c b/drivers/gpu/drm/drm_crtc.c
index 9f47dfc..95a99ca 100644 (file)
--- a/drivers/gpu/drm/drm_crtc.c
+++ b/drivers/gpu/drm/drm_crtc.c
@@ -2225,7 +2225,7 @@ int drm_mode_getfb(struct drm_device *dev,
        r->width = fb->width;
        r->depth = fb->depth;
        r->bpp = fb->bits_per_pixel;
-       r->pitch = fb->pitch;
+       r->pitch = fb->pitches[0];
        fb->funcs->create_handle(fb, file_priv, &r->handle);
 
 out:

diff --git a/drivers/gpu/drm/drm_crtc_helper.c b/drivers/gpu/drm/drm_crtc_helper.c
index f31175b..e08464b 100644 (file)
--- a/drivers/gpu/drm/drm_crtc_helper.c
+++ b/drivers/gpu/drm/drm_crtc_helper.c
@@ -872,9 +872,16 @@ EXPORT_SYMBOL(drm_helper_get_fb_bpp_depth);
 int drm_helper_mode_fill_fb_struct(struct drm_framebuffer *fb,
                                   struct drm_mode_fb_cmd2 *mode_cmd)
 {
+       int i;
+
        fb->width = mode_cmd->width;
        fb->height = mode_cmd->height;
-       fb->pitch = mode_cmd->pitches[0];
+
+       for (i = 0; i < 4; i++) {
+               fb->pitches[i] = mode_cmd->pitches[i];
+               fb->offsets[i] = mode_cmd->offsets[i];
+       }
+
        drm_helper_get_fb_bpp_depth(mode_cmd->pixel_format, &fb->depth,
                                    &fb->bits_per_pixel);
        fb->pixel_format = mode_cmd->pixel_format;

diff --git a/drivers/gpu/drm/i915/i915_irq.c b/drivers/gpu/drm/i915/i915_irq.c
index 9b1d669..d377615 100644 (file)
--- a/drivers/gpu/drm/i915/i915_irq.c
+++ b/drivers/gpu/drm/i915/i915_irq.c
@@ -1200,7 +1200,7 @@ static void i915_pageflip_stall_check(struct drm_device *dev, int pipe)
        } else {
                int dspaddr = DSPADDR(intel_crtc->plane);
                stall_detected = I915_READ(dspaddr) == (obj->gtt_offset +
-                                                       crtc->y * crtc->fb->pitch +
+                                                       crtc->y * crtc->fb->pitches[0] +
                                                        crtc->x * crtc->fb->bits_per_pixel/8);
        }
 

diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c
index 6156c79..4e3441c 100644 (file)
--- a/drivers/gpu/drm/i915/intel_display.c
+++ b/drivers/gpu/drm/i915/intel_display.c
@@ -1391,7 +1391,7 @@ static void i8xx_enable_fbc(struct drm_crtc *crtc, unsigned long interval)
        int plane, i;
        u32 fbc_ctl, fbc_ctl2;
 
-       if (fb->pitch == dev_priv->cfb_pitch &&
+       if (fb->pitches[0] == dev_priv->cfb_pitch &&
            obj->fence_reg == dev_priv->cfb_fence &&
            intel_crtc->plane == dev_priv->cfb_plane &&
            I915_READ(FBC_CONTROL) & FBC_CTL_EN)
@@ -1401,8 +1401,8 @@ static void i8xx_enable_fbc(struct drm_crtc *crtc, unsigned long interval)
 
        dev_priv->cfb_pitch = dev_priv->cfb_size / FBC_LL_SIZE;
 
-       if (fb->pitch < dev_priv->cfb_pitch)
-               dev_priv->cfb_pitch = fb->pitch;
+       if (fb->pitches[0] < dev_priv->cfb_pitch)
+               dev_priv->cfb_pitch = fb->pitches[0];
 
        /* FBC_CTL wants 64B units */
        dev_priv->cfb_pitch = (dev_priv->cfb_pitch / 64) - 1;
@@ -1904,11 +1904,11 @@ intel_pipe_set_base_atomic(struct drm_crtc *crtc, struct drm_framebuffer *fb,
        I915_WRITE(reg, dspcntr);
 
        Start = obj->gtt_offset;
-       Offset = y * fb->pitch + x * (fb->bits_per_pixel / 8);
+       Offset = y * fb->pitches[0] + x * (fb->bits_per_pixel / 8);
 
        DRM_DEBUG_KMS("Writing base %08lX %08lX %d %d %d\n",
-                     Start, Offset, x, y, fb->pitch);
-       I915_WRITE(DSPSTRIDE(plane), fb->pitch);
+                     Start, Offset, x, y, fb->pitches[0]);
+       I915_WRITE(DSPSTRIDE(plane), fb->pitches[0]);
        if (INTEL_INFO(dev)->gen >= 4) {
                I915_WRITE(DSPSURF(plane), Start);
                I915_WRITE(DSPTILEOFF(plane), (y << 16) | x);
@@ -5646,11 +5646,11 @@ mode_fits_in_fbdev(struct drm_device *dev,
                return NULL;
 
        fb = &dev_priv->fbdev->ifb.base;
-       if (fb->pitch < intel_framebuffer_pitch_for_width(mode->hdisplay,
-                                                         fb->bits_per_pixel))
+       if (fb->pitches[0] < intel_framebuffer_pitch_for_width(mode->hdisplay,
+                                                              fb->bits_per_pixel))
                return NULL;
 
-       if (obj->base.size < mode->vdisplay * fb->pitch)
+       if (obj->base.size < mode->vdisplay * fb->pitches[0])
                return NULL;
 
        return fb;
@@ -6282,7 +6282,7 @@ static int intel_gen2_queue_flip(struct drm_device *dev,
                goto out;
 
        /* Offset into the new buffer for cases of shared fbs between CRTCs */
-       offset = crtc->y * fb->pitch + crtc->x * fb->bits_per_pixel/8;
+       offset = crtc->y * fb->pitches[0] + crtc->x * fb->bits_per_pixel/8;
 
        ret = BEGIN_LP_RING(6);
        if (ret)
@@ -6299,7 +6299,7 @@ static int intel_gen2_queue_flip(struct drm_device *dev,
        OUT_RING(MI_NOOP);
        OUT_RING(MI_DISPLAY_FLIP |
                 MI_DISPLAY_FLIP_PLANE(intel_crtc->plane));
-       OUT_RING(fb->pitch);
+       OUT_RING(fb->pitches[0]);
        OUT_RING(obj->gtt_offset + offset);
        OUT_RING(MI_NOOP);
        ADVANCE_LP_RING();
@@ -6323,7 +6323,7 @@ static int intel_gen3_queue_flip(struct drm_device *dev,
                goto out;
 
        /* Offset into the new buffer for cases of shared fbs between CRTCs */
-       offset = crtc->y * fb->pitch + crtc->x * fb->bits_per_pixel/8;
+       offset = crtc->y * fb->pitches[0] + crtc->x * fb->bits_per_pixel/8;
 
        ret = BEGIN_LP_RING(6);
        if (ret)
@@ -6337,7 +6337,7 @@ static int intel_gen3_queue_flip(struct drm_device *dev,
        OUT_RING(MI_NOOP);
        OUT_RING(MI_DISPLAY_FLIP_I915 |
                 MI_DISPLAY_FLIP_PLANE(intel_crtc->plane));
-       OUT_RING(fb->pitch);
+       OUT_RING(fb->pitches[0]);
        OUT_RING(obj->gtt_offset + offset);
        OUT_RING(MI_NOOP);
 
@@ -6370,7 +6370,7 @@ static int intel_gen4_queue_flip(struct drm_device *dev,
         */
        OUT_RING(MI_DISPLAY_FLIP |
                 MI_DISPLAY_FLIP_PLANE(intel_crtc->plane));
-       OUT_RING(fb->pitch);
+       OUT_RING(fb->pitches[0]);
        OUT_RING(obj->gtt_offset | obj->tiling_mode);
 
        /* XXX Enabling the panel-fitter across page-flip is so far
@@ -6405,7 +6405,7 @@ static int intel_gen6_queue_flip(struct drm_device *dev,
 
        OUT_RING(MI_DISPLAY_FLIP |
                 MI_DISPLAY_FLIP_PLANE(intel_crtc->plane));
-       OUT_RING(fb->pitch | obj->tiling_mode);
+       OUT_RING(fb->pitches[0] | obj->tiling_mode);
        OUT_RING(obj->gtt_offset);
 
        pf = I915_READ(PF_CTL(intel_crtc->pipe)) & PF_ENABLE;
@@ -6441,7 +6441,7 @@ static int intel_gen7_queue_flip(struct drm_device *dev,
                goto out;
 
        intel_ring_emit(ring, MI_DISPLAY_FLIP_I915 | (intel_crtc->plane << 19));
-       intel_ring_emit(ring, (fb->pitch | obj->tiling_mode));
+       intel_ring_emit(ring, (fb->pitches[0] | obj->tiling_mode));
        intel_ring_emit(ring, (obj->gtt_offset));
        intel_ring_emit(ring, (MI_NOOP));
        intel_ring_advance(ring);

diff --git a/drivers/gpu/drm/i915/intel_fb.c b/drivers/gpu/drm/i915/intel_fb.c
index dc1db4f..f02fc71 100644 (file)
--- a/drivers/gpu/drm/i915/intel_fb.c
+++ b/drivers/gpu/drm/i915/intel_fb.c
@@ -149,7 +149,7 @@ static int intelfb_create(struct intel_fbdev *ifbdev,
 
 //     memset(info->screen_base, 0, size);
 
-       drm_fb_helper_fill_fix(info, fb->pitch, fb->depth);
+       drm_fb_helper_fill_fix(info, fb->pitches[0], fb->depth);
        drm_fb_helper_fill_var(info, &ifbdev->helper, sizes->fb_width, sizes->fb_height);
 
        info->pixmap.size = 64*1024;

diff --git a/drivers/gpu/drm/nouveau/nouveau_display.c b/drivers/gpu/drm/nouveau/nouveau_display.c
index 985cdee..f83cb75 100644 (file)
--- a/drivers/gpu/drm/nouveau/nouveau_display.c
+++ b/drivers/gpu/drm/nouveau/nouveau_display.c
@@ -106,12 +106,12 @@ nouveau_framebuffer_init(struct drm_device *dev,
                        nv_fb->r_format |= (tile_flags << 8);
 
                if (!tile_flags)
-                       nv_fb->r_pitch = 0x00100000 | fb->pitch;
+                       nv_fb->r_pitch = 0x00100000 | fb->pitches[0];
                else {
                        u32 mode = nvbo->tile_mode;
                        if (dev_priv->card_type >= NV_C0)
                                mode >>= 4;
-                       nv_fb->r_pitch = ((fb->pitch / 4) << 4) | mode;
+                       nv_fb->r_pitch = ((fb->pitches[0] / 4) << 4) | mode;
                }
        }
 
@@ -291,7 +291,7 @@ nouveau_crtc_page_flip(struct drm_crtc *crtc, struct drm_framebuffer *fb,
        /* Initialize a page flip struct */
        *s = (struct nouveau_page_flip_state)
                { { }, event, nouveau_crtc(crtc)->index,
-                 fb->bits_per_pixel, fb->pitch, crtc->x, crtc->y,
+                 fb->bits_per_pixel, fb->pitches[0], crtc->x, crtc->y,
                  new_bo->bo.offset };
 
        /* Choose the channel the flip will be handled in */

diff --git a/drivers/gpu/drm/nouveau/nouveau_fbcon.c b/drivers/gpu/drm/nouveau/nouveau_fbcon.c
index 9cb5186..23ee7a3 100644 (file)
--- a/drivers/gpu/drm/nouveau/nouveau_fbcon.c
+++ b/drivers/gpu/drm/nouveau/nouveau_fbcon.c
@@ -360,7 +360,7 @@ nouveau_fbcon_create(struct nouveau_fbdev *nfbdev,
        info->screen_base = nvbo_kmap_obj_iovirtual(nouveau_fb->nvbo);
        info->screen_size = size;
 
-       drm_fb_helper_fill_fix(info, fb->pitch, fb->depth);
+       drm_fb_helper_fill_fix(info, fb->pitches[0], fb->depth);
        drm_fb_helper_fill_var(info, &nfbdev->helper, sizes->fb_width, sizes->fb_height);
 
        /* Set aperture base/size for vesafb takeover */

diff --git a/drivers/gpu/drm/nouveau/nv04_crtc.c b/drivers/gpu/drm/nouveau/nv04_crtc.c
index f1a3ae4..85edff6 100644 (file)
--- a/drivers/gpu/drm/nouveau/nv04_crtc.c
+++ b/drivers/gpu/drm/nouveau/nv04_crtc.c
@@ -364,7 +364,7 @@ nv_crtc_mode_set_vga(struct drm_crtc *crtc, struct drm_display_mode *mode)
        regp->CRTC[NV_CIO_CR_VRE_INDEX] = 1 << 5 | XLATE(vertEnd, 0, NV_CIO_CR_VRE_3_0);
        regp->CRTC[NV_CIO_CR_VDE_INDEX] = vertDisplay;
        /* framebuffer can be larger than crtc scanout area. */
-       regp->CRTC[NV_CIO_CR_OFFSET_INDEX] = fb->pitch / 8;
+       regp->CRTC[NV_CIO_CR_OFFSET_INDEX] = fb->pitches[0] / 8;
        regp->CRTC[NV_CIO_CR_ULINE_INDEX] = 0x00;
        regp->CRTC[NV_CIO_CR_VBS_INDEX] = vertBlankStart;
        regp->CRTC[NV_CIO_CR_VBE_INDEX] = vertBlankEnd;
@@ -377,9 +377,9 @@ nv_crtc_mode_set_vga(struct drm_crtc *crtc, struct drm_display_mode *mode)
 
        /* framebuffer can be larger than crtc scanout area. */
        regp->CRTC[NV_CIO_CRE_RPC0_INDEX] =
-               XLATE(fb->pitch / 8, 8, NV_CIO_CRE_RPC0_OFFSET_10_8);
+               XLATE(fb->pitches[0] / 8, 8, NV_CIO_CRE_RPC0_OFFSET_10_8);
        regp->CRTC[NV_CIO_CRE_42] =
-               XLATE(fb->pitch / 8, 11, NV_CIO_CRE_42_OFFSET_11);
+               XLATE(fb->pitches[0] / 8, 11, NV_CIO_CRE_42_OFFSET_11);
        regp->CRTC[NV_CIO_CRE_RPC1_INDEX] = mode->crtc_hdisplay < 1280 ?
                                            MASK(NV_CIO_CRE_RPC1_LARGE) : 0x00;
        regp->CRTC[NV_CIO_CRE_LSR_INDEX] = XLATE(horizBlankEnd, 6, NV_CIO_CRE_LSR_HBE_6) |
@@ -824,18 +824,18 @@ nv04_crtc_do_mode_set_base(struct drm_crtc *crtc,
        NVWriteRAMDAC(dev, nv_crtc->index, NV_PRAMDAC_GENERAL_CONTROL,
                      regp->ramdac_gen_ctrl);
 
-       regp->CRTC[NV_CIO_CR_OFFSET_INDEX] = drm_fb->pitch >> 3;
+       regp->CRTC[NV_CIO_CR_OFFSET_INDEX] = drm_fb->pitches[0] >> 3;
        regp->CRTC[NV_CIO_CRE_RPC0_INDEX] =
-               XLATE(drm_fb->pitch >> 3, 8, NV_CIO_CRE_RPC0_OFFSET_10_8);
+               XLATE(drm_fb->pitches[0] >> 3, 8, NV_CIO_CRE_RPC0_OFFSET_10_8);
        regp->CRTC[NV_CIO_CRE_42] =
-               XLATE(drm_fb->pitch / 8, 11, NV_CIO_CRE_42_OFFSET_11);
+               XLATE(drm_fb->pitches[0] / 8, 11, NV_CIO_CRE_42_OFFSET_11);
        crtc_wr_cio_state(crtc, regp, NV_CIO_CRE_RPC0_INDEX);
        crtc_wr_cio_state(crtc, regp, NV_CIO_CR_OFFSET_INDEX);
        crtc_wr_cio_state(crtc, regp, NV_CIO_CRE_42);
 
        /* Update the framebuffer location. */
        regp->fb_start = nv_crtc->fb.offset & ~3;
-       regp->fb_start += (y * drm_fb->pitch) + (x * drm_fb->bits_per_pixel / 8);
+       regp->fb_start += (y * drm_fb->pitches[0]) + (x * drm_fb->bits_per_pixel / 8);
        nv_set_crtc_base(dev, nv_crtc->index, regp->fb_start);
 
        /* Update the arbitration parameters. */

diff --git a/drivers/gpu/drm/radeon/atombios_crtc.c b/drivers/gpu/drm/radeon/atombios_crtc.c
index 9541995..bda06c0 100644 (file)
--- a/drivers/gpu/drm/radeon/atombios_crtc.c
+++ b/drivers/gpu/drm/radeon/atombios_crtc.c
@@ -1168,7 +1168,7 @@ static int dce4_crtc_do_set_base(struct drm_crtc *crtc,
        WREG32(EVERGREEN_GRPH_X_END + radeon_crtc->crtc_offset, target_fb->width);
        WREG32(EVERGREEN_GRPH_Y_END + radeon_crtc->crtc_offset, target_fb->height);
 
-       fb_pitch_pixels = target_fb->pitch / (target_fb->bits_per_pixel / 8);
+       fb_pitch_pixels = target_fb->pitches[0] / (target_fb->bits_per_pixel / 8);
        WREG32(EVERGREEN_GRPH_PITCH + radeon_crtc->crtc_offset, fb_pitch_pixels);
        WREG32(EVERGREEN_GRPH_ENABLE + radeon_crtc->crtc_offset, 1);
 
@@ -1337,7 +1337,7 @@ static int avivo_crtc_do_set_base(struct drm_crtc *crtc,
        WREG32(AVIVO_D1GRPH_X_END + radeon_crtc->crtc_offset, target_fb->width);
        WREG32(AVIVO_D1GRPH_Y_END + radeon_crtc->crtc_offset, target_fb->height);
 
-       fb_pitch_pixels = target_fb->pitch / (target_fb->bits_per_pixel / 8);
+       fb_pitch_pixels = target_fb->pitches[0] / (target_fb->bits_per_pixel / 8);
        WREG32(AVIVO_D1GRPH_PITCH + radeon_crtc->crtc_offset, fb_pitch_pixels);
        WREG32(AVIVO_D1GRPH_ENABLE + radeon_crtc->crtc_offset, 1);
 

diff --git a/drivers/gpu/drm/radeon/radeon_display.c b/drivers/gpu/drm/radeon/radeon_display.c
index 8ef4e5d..b2fb46b 100644 (file)
--- a/drivers/gpu/drm/radeon/radeon_display.c
+++ b/drivers/gpu/drm/radeon/radeon_display.c
@@ -415,7 +415,7 @@ static int radeon_crtc_page_flip(struct drm_crtc *crtc,
        if (!ASIC_IS_AVIVO(rdev)) {
                /* crtc offset is from display base addr not FB location */
                base -= radeon_crtc->legacy_display_base_addr;
-               pitch_pixels = fb->pitch / (fb->bits_per_pixel / 8);
+               pitch_pixels = fb->pitches[0] / (fb->bits_per_pixel / 8);
 
                if (tiling_flags & RADEON_TILING_MACRO) {
                        if (ASIC_IS_R300(rdev)) {

diff --git a/drivers/gpu/drm/radeon/radeon_fb.c b/drivers/gpu/drm/radeon/radeon_fb.c
index ea110ad..420855f 100644 (file)
--- a/drivers/gpu/drm/radeon/radeon_fb.c
+++ b/drivers/gpu/drm/radeon/radeon_fb.c
@@ -232,7 +232,7 @@ static int radeonfb_create(struct radeon_fbdev *rfbdev,
 
        strcpy(info->fix.id, "radeondrmfb");
 
-       drm_fb_helper_fill_fix(info, fb->pitch, fb->depth);
+       drm_fb_helper_fill_fix(info, fb->pitches[0], fb->depth);
 
        info->flags = FBINFO_DEFAULT | FBINFO_CAN_FORCE_OUTPUT;
        info->fbops = &radeonfb_ops;
@@ -275,7 +275,7 @@ static int radeonfb_create(struct radeon_fbdev *rfbdev,
        DRM_INFO("vram apper at 0x%lX\n",  (unsigned long)rdev->mc.aper_base);
        DRM_INFO("size %lu\n", (unsigned long)radeon_bo_size(rbo));
        DRM_INFO("fb depth is %d\n", fb->depth);
-       DRM_INFO("   pitch is %d\n", fb->pitch);
+       DRM_INFO("   pitch is %d\n", fb->pitches[0]);
 
        vga_switcheroo_client_fb_set(rdev->ddev->pdev, info);
        return 0;

diff --git a/drivers/gpu/drm/radeon/radeon_legacy_crtc.c b/drivers/gpu/drm/radeon/radeon_legacy_crtc.c
index 41a5d48..95b9360 100644 (file)
--- a/drivers/gpu/drm/radeon/radeon_legacy_crtc.c
+++ b/drivers/gpu/drm/radeon/radeon_legacy_crtc.c
@@ -437,7 +437,7 @@ int radeon_crtc_do_set_base(struct drm_crtc *crtc,
 
        crtc_offset_cntl = 0;
 
-       pitch_pixels = target_fb->pitch / (target_fb->bits_per_pixel / 8);
+       pitch_pixels = target_fb->pitches[0] / (target_fb->bits_per_pixel / 8);
        crtc_pitch  = (((pitch_pixels * target_fb->bits_per_pixel) +
                        ((target_fb->bits_per_pixel * 8) - 1)) /
                       (target_fb->bits_per_pixel * 8));

diff --git a/drivers/gpu/drm/vmwgfx/vmwgfx_kms.c b/drivers/gpu/drm/vmwgfx/vmwgfx_kms.c
index 3ee7781..86e77f8 100644 (file)
--- a/drivers/gpu/drm/vmwgfx/vmwgfx_kms.c
+++ b/drivers/gpu/drm/vmwgfx/vmwgfx_kms.c
@@ -595,7 +595,7 @@ static int vmw_kms_new_framebuffer_surface(struct vmw_private *dev_priv,
 
        /* XXX get the first 3 from the surface info */
        vfbs->base.base.bits_per_pixel = mode_cmd->bpp;
-       vfbs->base.base.pitch = mode_cmd->pitch;
+       vfbs->base.base.pitches[0] = mode_cmd->pitch;
        vfbs->base.base.depth = mode_cmd->depth;
        vfbs->base.base.width = mode_cmd->width;
        vfbs->base.base.height = mode_cmd->height;
@@ -708,7 +708,7 @@ static int vmw_surface_dmabuf_pin(struct vmw_framebuffer *vfb)
        struct vmw_private *dev_priv = vmw_priv(vfb->base.dev);
        struct vmw_framebuffer_surface *vfbs =
                vmw_framebuffer_to_vfbs(&vfb->base);
-       unsigned long size = vfbs->base.base.pitch * vfbs->base.base.height;
+       unsigned long size = vfbs->base.base.pitches[0] * vfbs->base.base.height;
        int ret;
 
        vfbs->buffer = kzalloc(sizeof(*vfbs->buffer), GFP_KERNEL);
@@ -811,7 +811,7 @@ static int vmw_kms_new_framebuffer_dmabuf(struct vmw_private *dev_priv,
        }
 
        vfbd->base.base.bits_per_pixel = mode_cmd->bpp;
-       vfbd->base.base.pitch = mode_cmd->pitch;
+       vfbd->base.base.pitches[0] = mode_cmd->pitch;
        vfbd->base.base.depth = mode_cmd->depth;
        vfbd->base.base.width = mode_cmd->width;
        vfbd->base.base.height = mode_cmd->height;

diff --git a/drivers/gpu/drm/vmwgfx/vmwgfx_ldu.c b/drivers/gpu/drm/vmwgfx/vmwgfx_ldu.c
index b3a2cd5..b2d77f7 100644 (file)
--- a/drivers/gpu/drm/vmwgfx/vmwgfx_ldu.c
+++ b/drivers/gpu/drm/vmwgfx/vmwgfx_ldu.c
@@ -114,7 +114,7 @@ static int vmw_ldu_commit_list(struct vmw_private *dev_priv)
                        return 0;
                fb = entry->base.crtc.fb;
 
-               vmw_kms_write_svga(dev_priv, w, h, fb->pitch,
+               vmw_kms_write_svga(dev_priv, w, h, fb->pitches[0],
                                   fb->bits_per_pixel, fb->depth);
 
                return 0;
@@ -124,7 +124,7 @@ static int vmw_ldu_commit_list(struct vmw_private *dev_priv)
                entry = list_entry(lds->active.next, typeof(*entry), active);
                fb = entry->base.crtc.fb;
 
-               vmw_kms_write_svga(dev_priv, fb->width, fb->height, fb->pitch,
+               vmw_kms_write_svga(dev_priv, fb->width, fb->height, fb->pitches[0],
                                   fb->bits_per_pixel, fb->depth);
        }
 

diff --git a/drivers/staging/mrst/drv/psb_fb.c b/drivers/staging/mrst/drv/psb_fb.c
index c1b0bc5..bdc306e 100644 (file)
--- a/drivers/staging/mrst/drv/psb_fb.c
+++ b/drivers/staging/mrst/drv/psb_fb.c
@@ -300,7 +300,7 @@ static struct drm_framebuffer *psb_user_framebuffer_create
        info->screen_base = psKernelMemInfo->pvLinAddrKM;
        info->screen_size = size;
 
-       drm_fb_helper_fill_fix(info, fb->pitch, fb->depth);
+       drm_fb_helper_fill_fix(info, fb->pitches[0], fb->depth);
        drm_fb_helper_fill_var(info, &fbdev->psb_fb_helper, fb->width, fb->height);
 
        info->fix.mmio_start = pci_resource_start(dev->pdev, 0);
@@ -383,7 +383,7 @@ static int psbfb_create(struct psb_fbdev * fbdev, struct drm_fb_helper_surface_s
        info->screen_size = size;
        memset(info->screen_base, 0, size);
 
-       drm_fb_helper_fill_fix(info, fb->pitch, fb->depth);
+       drm_fb_helper_fill_fix(info, fb->pitches[0], fb->depth);
        drm_fb_helper_fill_var(info, &fbdev->psb_fb_helper, sizes->fb_width, sizes->fb_height);
 
        info->fix.mmio_start = pci_resource_start(dev->pdev, 0);
@@ -396,7 +396,7 @@ static int psbfb_create(struct psb_fbdev * fbdev, struct drm_fb_helper_surface_s
        info->pixmap.scan_align = 1;
 
        DRM_DEBUG("fb depth is %d\n", fb->depth);
-       DRM_DEBUG("   pitch is %d\n", fb->pitch);
+       DRM_DEBUG("   pitch is %d\n", fb->pitches[0]);
 
        printk(KERN_INFO"allocated %dx%d fb\n", psbfb->base.width, psbfb->base.height); 
 

diff --git a/drivers/staging/mrst/drv/psb_intel_display.c b/drivers/staging/mrst/drv/psb_intel_display.c
index 7157a69..67af879 100644 (file)
--- a/drivers/staging/mrst/drv/psb_intel_display.c
+++ b/drivers/staging/mrst/drv/psb_intel_display.c
@@ -924,9 +924,9 @@ static int mdfld__intel_pipe_set_base(struct drm_crtc *crtc, int x, int y,
                return 0;
 
        Start = mode_dev->bo_offset(dev, psbfb);
-       Offset = y * crtc->fb->pitch + x * (crtc->fb->bits_per_pixel / 8);
+       Offset = y * crtc->fb->pitches[0] + x * (crtc->fb->bits_per_pixel / 8);
 
-       REG_WRITE(dspstride, crtc->fb->pitch);
+       REG_WRITE(dspstride, crtc->fb->pitches[0]);
        dspcntr = REG_READ(dspcntr_reg);
        dspcntr &= ~DISPPLANE_PIXFORMAT_MASK;
 

diff --git a/drivers/staging/mrst/pvr/services4/3rdparty/linux_framebuffer_mrst/mrstlfb_displayclass.c b/drivers/staging/mrst/pvr/services4/3rdparty/linux_framebuffer_mrst/mrstlfb_displayclass.c
index c2a79a7..965a3e2 100644 (file)
--- a/drivers/staging/mrst/pvr/services4/3rdparty/linux_framebuffer_mrst/mrstlfb_displayclass.c
+++ b/drivers/staging/mrst/pvr/services4/3rdparty/linux_framebuffer_mrst/mrstlfb_displayclass.c
@@ -1323,7 +1323,7 @@ int MRSTLFBHandleChangeFB(struct drm_device* dev, struct psb_framebuffer *psbfb)
 
        psDevInfo->sDisplayFormat.pixelformat = (psbfb->base.depth == 16) ? PVRSRV_PIXEL_FORMAT_RGB565 : PVRSRV_PIXEL_FORMAT_ARGB8888;
 
-       psDevInfo->sDisplayDim.ui32ByteStride = psbfb->base.pitch;
+       psDevInfo->sDisplayDim.ui32ByteStride = psbfb->base.pitches[0];
        psDevInfo->sDisplayDim.ui32Width = psbfb->base.width;
        psDevInfo->sDisplayDim.ui32Height = psbfb->base.height;
 
@@ -1383,7 +1383,7 @@ int MRSTLFBHandleChangeFB(struct drm_device* dev, struct psb_framebuffer *psbfb)
 
        psDevInfo->sDisplayFormat.pixelformat = (psbfb->base.depth == 16) ? PVRSRV_PIXEL_FORMAT_RGB565 : PVRSRV_PIXEL_FORMAT_ARGB8888;
 
-       psDevInfo->sDisplayDim.ui32ByteStride = psbfb->base.pitch;
+       psDevInfo->sDisplayDim.ui32ByteStride = psbfb->base.pitches[0];
        psDevInfo->sDisplayDim.ui32Width = psbfb->base.width;
        psDevInfo->sDisplayDim.ui32Height = psbfb->base.height;
 
@@ -1514,7 +1514,7 @@ static MRST_ERROR InitDev(MRSTLFB_DEVINFO *psDevInfo)
 
        hdisplay = psDrmFB->width;
        vdisplay = psDrmFB->height;
-       FBSize = psDrmFB->pitch * psDrmFB->height;
+       FBSize = psDrmFB->pitches[0] * psDrmFB->height;
 
        psLINFBInfo = (struct fb_info*)psPsbFBDev->psb_fb_helper.fbdev;
 

diff --git a/include/drm/drm_crtc.h b/include/drm/drm_crtc.h
index 1ea4909..415a6e2 100644 (file)
--- a/include/drm/drm_crtc.h
+++ b/include/drm/drm_crtc.h
@@ -238,7 +238,8 @@ struct drm_framebuffer {
        struct list_head head;
        struct drm_mode_object base;
        const struct drm_framebuffer_funcs *funcs;
-       unsigned int pitch;
+       unsigned int pitches[4];
+       unsigned int offsets[4];
        unsigned int width;
        unsigned int height;
        /* depth can be 15 or 16 */