arm64: dts: renesas: rzg2ul-smarc: Move spi1 pinmux to carrier board DTSI

spi1 is available on the RZ/G2UL SMARC EVK carrier board (PMOD0), hence
moving the spi1 pinmux from SoM to carrier board. This is to keep
consistency with the other SMARC EVKs.

Also while moving the pinmux rename rspi1 to spi1 to be consistent with
other SMARC EVK DTSIs.

Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
Link: https://lore.kernel.org/r/20220921082221.10599-1-prabhakar.mahadev-lad.rj@bp.renesas.com
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>

diff --git a/arch/arm64/boot/dts/renesas/rzg2ul-smarc-pinfunction.dtsi b/arch/arm64/boot/dts/renesas/rzg2ul-smarc-pinfunction.dtsi
index bd8bc858c28c2d486d247aa4214e782d3626c202..58923dc83faa1f7dcd35d17e106faf1315f1ef7d 100644 (file)
--- a/arch/arm64/boot/dts/renesas/rzg2ul-smarc-pinfunction.dtsi
+++ b/arch/arm64/boot/dts/renesas/rzg2ul-smarc-pinfunction.dtsi
@@ -99,6 +99,13 @@
                input-enable;
        };
 
+       spi1_pins: spi1 {
+               pinmux = <RZG2L_PORT_PINMUX(4, 0, 2)>, /* CK */
+                        <RZG2L_PORT_PINMUX(4, 1, 2)>, /* MOSI */
+                        <RZG2L_PORT_PINMUX(4, 2, 2)>, /* MISO */
+                        <RZG2L_PORT_PINMUX(4, 3, 2)>; /* SSL */
+       };
+
        ssi1_pins: ssi1 {
                pinmux = <RZG2L_PORT_PINMUX(3, 0, 2)>, /* BCK */
                         <RZG2L_PORT_PINMUX(3, 1, 2)>, /* RCK */

diff --git a/arch/arm64/boot/dts/renesas/rzg2ul-smarc-som.dtsi b/arch/arm64/boot/dts/renesas/rzg2ul-smarc-som.dtsi
index 2a0feb53f0dcbc6ebb2f47f102f0010358654be4..931efc07d6fb5286211b9c52152eaf49fd35e135 100644 (file)
--- a/arch/arm64/boot/dts/renesas/rzg2ul-smarc-som.dtsi
+++ b/arch/arm64/boot/dts/renesas/rzg2ul-smarc-som.dtsi
@@ -221,13 +221,6 @@
                        pinmux = <RZG2L_PORT_PINMUX(0, 0, 1)>; /* SD0_CD */
                };
        };
-
-       spi1_pins: rspi1 {
-               pinmux = <RZG2L_PORT_PINMUX(4, 0, 2)>, /* CK */
-                        <RZG2L_PORT_PINMUX(4, 1, 2)>, /* MOSI */
-                        <RZG2L_PORT_PINMUX(4, 2, 2)>, /* MISO */
-                        <RZG2L_PORT_PINMUX(4, 3, 2)>; /* SSL */
-       };
 };
 
 #if (SW_SW0_DEV_SEL)