ARM: tegra2: convert to CONFIG_MULTI_IRQ_HANDLER
authorMarc Zyngier <marc.zyngier@arm.com>
Tue, 6 Sep 2011 09:23:45 +0000 (10:23 +0100)
committerMarc Zyngier <marc.zyngier@arm.com>
Tue, 15 Nov 2011 18:14:00 +0000 (18:14 +0000)
Convert the tegra2 platforms to be using the gic_handle_irq
function as their primary interrupt handler.

Tested on harmony.

Cc: Colin Cross <ccross@android.com>
Acked-by: Stephen Warren <swarren@nvidia.com>
Acked-by: Olof Johansson <olof@lixom.net>
Signed-off-by: Marc Zyngier <marc.zyngier@arm.com>
arch/arm/mach-tegra/Kconfig
arch/arm/mach-tegra/board-dt.c
arch/arm/mach-tegra/board-harmony.c
arch/arm/mach-tegra/board-paz00.c
arch/arm/mach-tegra/board-seaboard.c
arch/arm/mach-tegra/board-trimslice.c
arch/arm/mach-tegra/include/mach/entry-macro.S

index 91aff7c..a6faa50 100644 (file)
@@ -13,6 +13,7 @@ config ARCH_TEGRA_2x_SOC
        select USB_ARCH_HAS_EHCI if USB_SUPPORT
        select USB_ULPI if USB_SUPPORT
        select USB_ULPI_VIEWPORT if USB_SUPPORT
+       select MULTI_IRQ_HANDLER
        help
          Support for NVIDIA Tegra AP20 and T20 processors, based on the
          ARM CortexA9MP CPU and the ARM PL310 L2 cache controller
index 74743ad..f6f03ce 100644 (file)
@@ -32,6 +32,7 @@
 #include <linux/i2c.h>
 #include <linux/i2c-tegra.h>
 
+#include <asm/hardware/gic.h>
 #include <asm/mach-types.h>
 #include <asm/mach/arch.h>
 #include <asm/mach/time.h>
@@ -130,6 +131,7 @@ DT_MACHINE_START(TEGRA_DT, "nVidia Tegra (Flattened Device Tree)")
        .map_io         = tegra_map_common_io,
        .init_early     = tegra_init_early,
        .init_irq       = tegra_init_irq,
+       .handle_irq     = gic_handle_irq,
        .timer          = &tegra_timer,
        .init_machine   = tegra_dt_init,
        .dt_compat      = tegra_dt_board_compat,
index f0bdc5e..fd190a8 100644 (file)
@@ -31,6 +31,7 @@
 #include <asm/mach-types.h>
 #include <asm/mach/arch.h>
 #include <asm/mach/time.h>
+#include <asm/hardware/gic.h>
 #include <asm/setup.h>
 
 #include <mach/tegra_wm8903_pdata.h>
@@ -187,6 +188,7 @@ MACHINE_START(HARMONY, "harmony")
        .map_io         = tegra_map_common_io,
        .init_early     = tegra_init_early,
        .init_irq       = tegra_init_irq,
+       .handle_irq     = gic_handle_irq,
        .timer          = &tegra_timer,
        .init_machine   = tegra_harmony_init,
 MACHINE_END
index 55c55ba..0b7e1cf 100644 (file)
@@ -29,6 +29,7 @@
 #include <linux/gpio.h>
 #include <linux/rfkill-gpio.h>
 
+#include <asm/hardware/gic.h>
 #include <asm/mach-types.h>
 #include <asm/mach/arch.h>
 #include <asm/mach/time.h>
@@ -190,6 +191,7 @@ MACHINE_START(PAZ00, "Toshiba AC100 / Dynabook AZ")
        .map_io         = tegra_map_common_io,
        .init_early     = tegra_init_early,
        .init_irq       = tegra_init_irq,
+       .handle_irq     = gic_handle_irq,
        .timer          = &tegra_timer,
        .init_machine   = tegra_paz00_init,
 MACHINE_END
index bf13ea3..7328379 100644 (file)
@@ -34,6 +34,7 @@
 
 #include <asm/mach-types.h>
 #include <asm/mach/arch.h>
+#include <asm/hardware/gic.h>
 
 #include "board.h"
 #include "board-seaboard.h"
@@ -284,6 +285,7 @@ MACHINE_START(SEABOARD, "seaboard")
        .map_io         = tegra_map_common_io,
        .init_early     = tegra_init_early,
        .init_irq       = tegra_init_irq,
+       .handle_irq     = gic_handle_irq,
        .timer          = &tegra_timer,
        .init_machine   = tegra_seaboard_init,
 MACHINE_END
@@ -293,6 +295,7 @@ MACHINE_START(KAEN, "kaen")
        .map_io         = tegra_map_common_io,
        .init_early     = tegra_init_early,
        .init_irq       = tegra_init_irq,
+       .handle_irq     = gic_handle_irq,
        .timer          = &tegra_timer,
        .init_machine   = tegra_kaen_init,
 MACHINE_END
@@ -302,6 +305,7 @@ MACHINE_START(WARIO, "wario")
        .map_io         = tegra_map_common_io,
        .init_early     = tegra_init_early,
        .init_irq       = tegra_init_irq,
+       .handle_irq     = gic_handle_irq,
        .timer          = &tegra_timer,
        .init_machine   = tegra_wario_init,
 MACHINE_END
index 1a6617b..60a36a2 100644 (file)
@@ -26,6 +26,7 @@
 #include <linux/i2c.h>
 #include <linux/gpio.h>
 
+#include <asm/hardware/gic.h>
 #include <asm/mach-types.h>
 #include <asm/mach/arch.h>
 #include <asm/setup.h>
@@ -176,6 +177,7 @@ MACHINE_START(TRIMSLICE, "trimslice")
        .map_io         = tegra_map_common_io,
        .init_early     = tegra_init_early,
        .init_irq       = tegra_init_irq,
+       .handle_irq     = gic_handle_irq,
        .timer          = &tegra_timer,
        .init_machine   = tegra_trimslice_init,
 MACHINE_END
index dd165c5..ac11262 100644 (file)
  * GNU General Public License for more details.
  *
  */
-#include <mach/iomap.h>
-#include <mach/io.h>
-
-#if defined(CONFIG_ARM_GIC)
-#define HAVE_GET_IRQNR_PREAMBLE
-#include <asm/hardware/entry-macro-gic.S>
-
-       /* Uses the GIC interrupt controller built into the cpu */
-#define ICTRL_BASE (IO_CPU_VIRT + 0x100)
 
        .macro  disable_fiq
        .endm
 
-       .macro  get_irqnr_preamble, base, tmp
-       movw \base, #(ICTRL_BASE & 0x0000ffff)
-       movt \base, #((ICTRL_BASE & 0xffff0000) >> 16)
+       .macro  arch_ret_to_user, tmp1, tmp2
        .endm
 
-       .macro  arch_ret_to_user, tmp1, tmp2
-       .endm
-#else
+#if !defined(CONFIG_ARM_GIC)
        /* legacy interrupt controller for AP16 */
-       .macro  disable_fiq
-       .endm
 
        .macro  get_irqnr_preamble, base, tmp
        @ enable imprecise aborts
@@ -46,9 +31,6 @@
        orr \base, #0x0000f000
        .endm
 
-       .macro  arch_ret_to_user, tmp1, tmp2
-       .endm
-
        .macro  get_irqnr_and_base, irqnr, irqstat, base, tmp
        ldr \irqnr, [\base, #0x20]      @ EVT_IRQ_STS
        cmp \irqnr, #0x80