ARM: dts: k3-am642-sk: Disable cpsw_port1 in SPL
authorVignesh Raghavendra <vigneshr@ti.com>
Fri, 21 Jan 2022 07:17:52 +0000 (12:47 +0530)
committerTom Rini <trini@konsulko.com>
Fri, 28 Jan 2022 22:58:41 +0000 (17:58 -0500)
ROM supports cpsw_port2 for Ethernet boot and SPL stages continue to
download images on the same port, therefore there is no need to enable
cpsw_port1. Disable the same.

Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>
arch/arm/dts/k3-am642-r5-sk.dts
arch/arm/dts/k3-am642-sk-u-boot.dtsi

index 3a17448..7d1cb85 100644 (file)
                     &rgmii2_pins_default>;
 };
 
-&cpsw_port1 {
-       phy-mode = "rgmii-rxid";
-       phy-handle = <&cpsw3g_phy0>;
-};
-
 &cpsw_port2 {
        phy-mode = "rgmii-rxid";
        phy-handle = <&cpsw3g_phy1>;
 };
 
 &cpsw3g_mdio {
-       cpsw3g_phy0: ethernet-phy@0 {
-               reg = <0>;
-               ti,rx-internal-delay = <DP83867_RGMIIDCTL_2_00_NS>;
-               ti,fifo-depth = <DP83867_PHYCR_FIFO_DEPTH_4_B_NIB>;
-       };
-
        cpsw3g_phy1: ethernet-phy@1 {
                reg = <1>;
                ti,rx-internal-delay = <DP83867_RGMIIDCTL_2_00_NS>;
index 2f5cfaa..e5c26b8 100644 (file)
        u-boot,dm-spl;
 };
 
-&cpsw_port1 {
-       u-boot,dm-spl;
-};
-
 &main_bcdma {
        u-boot,dm-spl;
 };
        u-boot,dm-spl;
 };
 
-&cpsw3g_phy0 {
-       u-boot,dm-spl;
-};
-
 &cpsw3g_phy1 {
        u-boot,dm-spl;
 };