ath9k: Add a delay between RTC reset/clear for AR9003
authorSujith Manoharan <c_manoha@qca.qualcomm.com>
Wed, 18 Dec 2013 04:23:25 +0000 (09:53 +0530)
committerJohn W. Linville <linville@tuxdriver.com>
Wed, 18 Dec 2013 20:23:48 +0000 (15:23 -0500)
The small delay that is present between a RTC reset/clear
operation is required for the chip to settle and this is
needed for all chips, not just the AR9002 family.

Signed-off-by: Sujith Manoharan <c_manoha@qca.qualcomm.com>
Signed-off-by: John W. Linville <linville@tuxdriver.com>
drivers/net/wireless/ath/ath9k/hw.c

index 2318bb9..2800914 100644 (file)
@@ -1399,8 +1399,7 @@ static bool ath9k_hw_set_reset_power_on(struct ath_hw *ah)
 
        REGWRITE_BUFFER_FLUSH(ah);
 
-       if (!AR_SREV_9300_20_OR_LATER(ah))
-               udelay(2);
+       udelay(2);
 
        if (!AR_SREV_9100(ah) && !AR_SREV_9300_20_OR_LATER(ah))
                REG_WRITE(ah, AR_RC, 0);