ARM: dts: r8a7742: Add QSPI support

Add QSPI DT node to R8A7742 SoC dtsi.

Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
Reviewed-by: Chris Paterson <Chris.Paterson2@renesas.com>
Link: https://lore.kernel.org/r/20200812150048.27721-3-prabhakar.mahadev-lad.rj@bp.renesas.com
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>

diff --git a/arch/arm/boot/dts/r8a7742.dtsi b/arch/arm/boot/dts/r8a7742.dtsi
index 5070e2a87231070b16aa01b2705e65b24d6e62ad..009827708bf44ba0746aaa88922e86e9a2111b58 100644 (file)
--- a/arch/arm/boot/dts/r8a7742.dtsi
+++ b/arch/arm/boot/dts/r8a7742.dtsi
@@ -701,6 +701,22 @@
                        status = "disabled";
                };
 
+               qspi: spi@e6b10000 {
+                       compatible = "renesas,qspi-r8a7742", "renesas,qspi";
+                       reg = <0 0xe6b10000 0 0x2c>;
+                       interrupts = <GIC_SPI 184 IRQ_TYPE_LEVEL_HIGH>;
+                       clocks = <&cpg CPG_MOD 917>;
+                       dmas = <&dmac0 0x17>, <&dmac0 0x18>,
+                              <&dmac1 0x17>, <&dmac1 0x18>;
+                       dma-names = "tx", "rx", "tx", "rx";
+                       power-domains = <&sysc R8A7742_PD_ALWAYS_ON>;
+                       resets = <&cpg 917>;
+                       num-cs = <1>;
+                       #address-cells = <1>;
+                       #size-cells = <0>;
+                       status = "disabled";
+               };
+
                scifa0: serial@e6c40000 {
                        compatible = "renesas,scifa-r8a7742",
                                     "renesas,rcar-gen2-scifa", "renesas,scifa";