+; NOTE: Assertions have been autogenerated by utils/update_test_checks.py
; RUN: opt < %s -simplifycfg -S | FileCheck %s
; In PR17073 ( http://llvm.org/pr17073 ), we illegally hoisted an operation that can trap.
@a = common global i32 0, align 4
@b = common global i8 0, align 1
-; CHECK-LABEL: can_trap1
-; CHECK-NOT: or i1 %tobool, icmp eq (i32* bitcast (i8* @b to i32*), i32* @a)
-; CHECK-NOT: select i1 %tobool, i32* null, i32* select (i1 icmp eq (i64 urem (i64 2, i64 zext (i1 icmp eq (i32* bitcast (i8* @b to i32*), i32* @a) to i64)), i64 0), i32* null, i32* @a)
define i32* @can_trap1() {
+; CHECK-LABEL: @can_trap1(
+; CHECK-NEXT: entry:
+; CHECK-NEXT: [[TMP0:%.*]] = load i32, i32* @a, align 4
+; CHECK-NEXT: [[TOBOOL:%.*]] = icmp eq i32 [[TMP0]], 0
+; CHECK-NEXT: br i1 [[TOBOOL]], label [[EXIT:%.*]], label [[BLOCK1:%.*]]
+; CHECK: block1:
+; CHECK-NEXT: br i1 icmp eq (i32* bitcast (i8* @b to i32*), i32* @a), label [[EXIT]], label [[BLOCK2:%.*]]
+; CHECK: block2:
+; CHECK-NEXT: br label [[EXIT]]
+; CHECK: exit:
+; CHECK-NEXT: [[STOREMERGE:%.*]] = phi i32* [ null, [[ENTRY:%.*]] ], [ null, [[BLOCK2]] ], [ select (i1 icmp eq (i64 urem (i64 2, i64 zext (i1 icmp eq (i32* bitcast (i8* @b to i32*), i32* @a) to i64)), i64 0), i32* null, i32* @a), [[BLOCK1]] ]
+; CHECK-NEXT: ret i32* [[STOREMERGE]]
+;
entry:
%0 = load i32, i32* @a, align 4
%tobool = icmp eq i32 %0, 0
ret i32* %storemerge
}
-; CHECK-LABEL: can_trap2
-; CHECK-NOT: or i1 %tobool, icmp eq (i32* bitcast (i8* @b to i32*), i32* @a)
-; CHECK-NOT: select i1 %tobool, i32* select (i1 icmp eq (i64 urem (i64 2, i64 zext (i1 icmp eq (i32* bitcast (i8* @b to i32*), i32* @a) to i64)), i64 0), i32* null, i32* @a), i32* null
define i32* @can_trap2() {
+; CHECK-LABEL: @can_trap2(
+; CHECK-NEXT: entry:
+; CHECK-NEXT: [[TMP0:%.*]] = load i32, i32* @a, align 4
+; CHECK-NEXT: [[TOBOOL:%.*]] = icmp eq i32 [[TMP0]], 0
+; CHECK-NEXT: br i1 [[TOBOOL]], label [[EXIT:%.*]], label [[BLOCK1:%.*]]
+; CHECK: block1:
+; CHECK-NEXT: ret i32* null
+; CHECK: exit:
+; CHECK-NEXT: ret i32* select (i1 icmp eq (i64 urem (i64 2, i64 zext (i1 icmp eq (i32* bitcast (i8* @b to i32*), i32* @a) to i64)), i64 0), i32* null, i32* @a)
+;
entry:
%0 = load i32, i32* @a, align 4
%tobool = icmp eq i32 %0, 0
ret i32* %storemerge
}
-; CHECK-LABEL: cannot_trap
-; CHECK: select i1 icmp eq (i32* bitcast (i8* @b to i32*), i32* @a), i32* select (i1 icmp eq (i64 add (i64 zext (i1 icmp eq (i32* bitcast (i8* @b to i32*), i32* @a) to i64), i64 2), i64 0), i32* null, i32* @a), i32* null
define i32* @cannot_trap() {
+; CHECK-LABEL: @cannot_trap(
+; CHECK-NEXT: entry:
+; CHECK-NEXT: [[TMP0:%.*]] = load i32, i32* @a, align 4
+; CHECK-NEXT: [[TOBOOL:%.*]] = icmp eq i32 [[TMP0]], 0
+; CHECK-NEXT: br i1 [[TOBOOL]], label [[EXIT:%.*]], label [[BLOCK1:%.*]]
+; CHECK: block1:
+; CHECK-NEXT: [[SPEC_SELECT:%.*]] = select i1 icmp eq (i32* bitcast (i8* @b to i32*), i32* @a), i32* select (i1 icmp eq (i64 add (i64 zext (i1 icmp eq (i32* bitcast (i8* @b to i32*), i32* @a) to i64), i64 2), i64 0), i32* null, i32* @a), i32* null
+; CHECK-NEXT: ret i32* [[SPEC_SELECT]]
+; CHECK: exit:
+; CHECK-NEXT: ret i32* null
+;
entry:
%0 = load i32, i32* @a, align 4
%tobool = icmp eq i32 %0, 0