cxl/pci: Rename pci.h to cxlpci.h
authorDan Williams <dan.j.williams@intel.com>
Mon, 24 Jan 2022 00:30:25 +0000 (16:30 -0800)
committerDan Williams <dan.j.williams@intel.com>
Wed, 9 Feb 2022 06:57:30 +0000 (22:57 -0800)
Similar to the mem.h rename, if the core wants to reuse definitions from
drivers/cxl/pci.h it is unable to use <pci.h> as that collides with
archs that have an arch/$arch/include/asm/pci.h, like MIPS.

Reported-by: kernel test robot <lkp@intel.com>
Acked-by: Ben Widawsky <ben.widawsky@intel.com>
Reviewed-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>
Link: https://lore.kernel.org/r/164298422510.3018233.14693126572756675563.stgit@dwillia2-desk3.amr.corp.intel.com
Signed-off-by: Dan Williams <dan.j.williams@intel.com>
drivers/cxl/acpi.c
drivers/cxl/core/regs.c
drivers/cxl/cxlpci.h [moved from drivers/cxl/pci.h with 99% similarity]
drivers/cxl/pci.c

index 5d848b7..8d4fd75 100644 (file)
@@ -6,8 +6,8 @@
 #include <linux/kernel.h>
 #include <linux/acpi.h>
 #include <linux/pci.h>
+#include "cxlpci.h"
 #include "cxl.h"
-#include "pci.h"
 
 /* Encode defined in CXL 2.0 8.2.5.12.7 HDM Decoder Control Register */
 #define CFMWS_INTERLEAVE_WAYS(x)       (1 << (x)->interleave_ways)
index 12a6cbd..65d7f58 100644 (file)
@@ -5,7 +5,7 @@
 #include <linux/slab.h>
 #include <linux/pci.h>
 #include <cxlmem.h>
-#include <pci.h>
+#include <cxlpci.h>
 
 /**
  * DOC: cxl registers
similarity index 99%
rename from drivers/cxl/pci.h
rename to drivers/cxl/cxlpci.h
index 0623bb8..eb00f59 100644 (file)
@@ -2,6 +2,7 @@
 /* Copyright(c) 2020 Intel Corporation. All rights reserved. */
 #ifndef __CXL_PCI_H__
 #define __CXL_PCI_H__
+#include "cxl.h"
 
 #define CXL_MEMORY_PROGIF      0x10
 
index 7d5f0c8..8b435b8 100644 (file)
@@ -10,7 +10,7 @@
 #include <linux/pci.h>
 #include <linux/io.h>
 #include "cxlmem.h"
-#include "pci.h"
+#include "cxlpci.h"
 #include "cxl.h"
 
 /**