arm64: dts: imx8dxl-ss-lsio: add gpio-ranges property

add gpio-ranges property for imx8dxl soc.

This gpio-range is used to record which GPIOs correspond to which pins on
which pin controllers. The GPIO to PIN mapping will be referenced by the
pad wakeup function in GPIO-MXC driver.

Signed-off-by: Shenwei Wang <shenwei.wang@nxp.com>
Reviewed-by: Linus Walleij <linus.walleij@linaro.org>
Reviewed-by: Peng Fan <peng.fan@nxp.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>

diff --git a/arch/arm64/boot/dts/freescale/imx8dxl-ss-lsio.dtsi b/arch/arm64/boot/dts/freescale/imx8dxl-ss-lsio.dtsi
index 85e6131..5f4f789 100644 (file)
--- a/arch/arm64/boot/dts/freescale/imx8dxl-ss-lsio.dtsi
+++ b/arch/arm64/boot/dts/freescale/imx8dxl-ss-lsio.dtsi
@@ -11,41 +11,82 @@
 &lsio_gpio0 {
        compatible = "fsl,imx8dxl-gpio", "fsl,imx35-gpio";
        interrupts = <GIC_SPI 78 IRQ_TYPE_LEVEL_HIGH>;
+       gpio-ranges = <&iomuxc 0 47 13>,
+                     <&iomuxc 13 61 4>,
+                     <&iomuxc 19 67 4>,
+                     <&iomuxc 24 72 1>;
 };
 
 &lsio_gpio1 {
        compatible = "fsl,imx8dxl-gpio", "fsl,imx35-gpio";
        interrupts = <GIC_SPI 79 IRQ_TYPE_LEVEL_HIGH>;
+       gpio-ranges = <&iomuxc 4 74 5>,
+                     <&iomuxc 9 80 16>;
 };
 
 &lsio_gpio2 {
        compatible = "fsl,imx8dxl-gpio", "fsl,imx35-gpio";
        interrupts = <GIC_SPI 80 IRQ_TYPE_LEVEL_HIGH>;
+       gpio-ranges = <&iomuxc 1 98 2>,
+                     <&iomuxc 3 101 1>,
+                     <&iomuxc 5 107 8>;
 };
 
 &lsio_gpio3 {
        compatible = "fsl,imx8dxl-gpio", "fsl,imx35-gpio";
        interrupts = <GIC_SPI 81 IRQ_TYPE_LEVEL_HIGH>;
+       gpio-ranges = <&iomuxc 0 115 4>,
+                     <&iomuxc 9 121 1>,
+                     <&iomuxc 10 120 1>,
+                     <&iomuxc 11 123 1>,
+                     <&iomuxc 12 122 1>,
+                     <&iomuxc 13 125 1>,
+                     <&iomuxc 14 124 1>,
+                     <&iomuxc 16 126 1>,
+                     <&iomuxc 17 128 1>,
+                     <&iomuxc 18 131 1>,
+                     <&iomuxc 19 130 1>,
+                     <&iomuxc 20 133 1>,
+                     <&iomuxc 21 132 1>,
+                     <&iomuxc 22 129 1>,
+                     <&iomuxc 23 134 1>;
 };
 
 &lsio_gpio4 {
        compatible = "fsl,imx8dxl-gpio", "fsl,imx35-gpio";
        interrupts = <GIC_SPI 82 IRQ_TYPE_LEVEL_HIGH>;
+       gpio-ranges = <&iomuxc 0 0 3>,
+                     <&iomuxc 3 4 4>,
+                     <&iomuxc 7 9 12>,
+                     <&iomuxc 19 22 2>,
+                     <&iomuxc 21 25 2>,
+                     <&iomuxc 29 29 3>;
 };
 
 &lsio_gpio5 {
        compatible = "fsl,imx8dxl-gpio", "fsl,imx35-gpio";
        interrupts = <GIC_SPI 83 IRQ_TYPE_LEVEL_HIGH>;
+       gpio-ranges = <&iomuxc 0 32 3>,
+                     <&iomuxc 3 36 6>,
+                     <&iomuxc 9 43 3>;
 };
 
 &lsio_gpio6 {
        compatible = "fsl,imx8dxl-gpio", "fsl,imx35-gpio";
        interrupts = <GIC_SPI 84 IRQ_TYPE_LEVEL_HIGH>;
+       gpio-ranges = <&iomuxc 0 53 7>,
+                     <&iomuxc 8 86 10>,
+                     <&iomuxc 19 107 8>;
 };
 
 &lsio_gpio7 {
        compatible = "fsl,imx8dxl-gpio", "fsl,imx35-gpio";
        interrupts = <GIC_SPI 85 IRQ_TYPE_LEVEL_HIGH>;
+       gpio-ranges = <&iomuxc 0 0 3>,
+                     <&iomuxc 3 4 4>,
+                     <&iomuxc 8 22 2>,
+                     <&iomuxc 10 25 2>,
+                     <&iomuxc 16 44 2>;
 };
 
 &lsio_mu0 {