CP_REG_TEST (or any command that reads registers) is slow on a618
(gen1). Since SQE can early return, we don't necessarily need
emit_conditional_ib in fd6_emit_tile.
We still CP_REG_TEST twice for load and store when there is no clear.
Not sure if we can simply drop emit_conditional_ib instead?
glmark2 score goes from 943 to 1067.
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21208>
static void
fd6_emit_tile(struct fd_batch *batch, const struct fd_tile *tile)
{
- if (!use_hw_binning(batch)) {
- fd6_emit_ib(batch->gmem, batch->draw);
- } else {
- emit_conditional_ib(batch, tile, batch->draw);
- }
+ fd6_emit_ib(batch->gmem, batch->draw);
if (batch->tile_epilogue)
fd6_emit_ib(batch->gmem, batch->tile_epilogue);