drm/amdgpu: Use apt name for FW reserved region
authorLijo Lazar <lijo.lazar@amd.com>
Tue, 8 Aug 2023 17:50:55 +0000 (12:50 -0500)
committerGreg Kroah-Hartman <gregkh@linuxfoundation.org>
Fri, 11 Aug 2023 10:08:27 +0000 (12:08 +0200)
commit db3b5cb64a9ca301d14ed027e470834316720e42 upstream

Use the generic term fw_reserved_memory for FW reserve region. This
region may also hold discovery TMR in addition to other reserve
regions. This region size could be larger than discovery tmr size, hence
don't change the discovery tmr size based on this.

Signed-off-by: Lijo Lazar <lijo.lazar@amd.com>
Reviewed-by: Le Ma <le.ma@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
[ This change fixes reading IP discovery from debugfs.
  It needed to be hand modified because:
  * GC 9.4.3 support isn't introduced in older kernels until
    228ce176434b ("drm/amdgpu: Handle VRAM dependencies on GFXIP9.4.3")
  * It also changed because of 58ab2c08d708 (drm/amdgpu: use VRAM|GTT
    for a bunch of kernel allocations) not being present.
Link: https://gitlab.freedesktop.org/drm/amd/-/issues/2748
Signed-off-by: Mario Limonciello <mario.limonciello@amd.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.c
drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.h

index 917147d..10469f2 100644 (file)
@@ -1625,14 +1625,15 @@ static int amdgpu_ttm_training_reserve_vram_fini(struct amdgpu_device *adev)
        return 0;
 }
 
-static void amdgpu_ttm_training_data_block_init(struct amdgpu_device *adev)
+static void amdgpu_ttm_training_data_block_init(struct amdgpu_device *adev,
+                                               uint32_t reserve_size)
 {
        struct psp_memory_training_context *ctx = &adev->psp.mem_train_ctx;
 
        memset(ctx, 0, sizeof(*ctx));
 
        ctx->c2p_train_data_offset =
-               ALIGN((adev->gmc.mc_vram_size - adev->mman.discovery_tmr_size - SZ_1M), SZ_1M);
+               ALIGN((adev->gmc.mc_vram_size - reserve_size - SZ_1M), SZ_1M);
        ctx->p2c_train_data_offset =
                (adev->gmc.mc_vram_size - GDDR6_MEM_TRAINING_OFFSET);
        ctx->train_data_size =
@@ -1650,9 +1651,10 @@ static void amdgpu_ttm_training_data_block_init(struct amdgpu_device *adev)
  */
 static int amdgpu_ttm_reserve_tmr(struct amdgpu_device *adev)
 {
-       int ret;
        struct psp_memory_training_context *ctx = &adev->psp.mem_train_ctx;
        bool mem_train_support = false;
+       uint32_t reserve_size = 0;
+       int ret;
 
        if (!amdgpu_sriov_vf(adev)) {
                if (amdgpu_atomfirmware_mem_training_supported(adev))
@@ -1668,14 +1670,15 @@ static int amdgpu_ttm_reserve_tmr(struct amdgpu_device *adev)
         * Otherwise, fallback to legacy approach to check and reserve tmr block for ip
         * discovery data and G6 memory training data respectively
         */
-       adev->mman.discovery_tmr_size =
-               amdgpu_atomfirmware_get_fw_reserved_fb_size(adev);
-       if (!adev->mman.discovery_tmr_size)
-               adev->mman.discovery_tmr_size = DISCOVERY_TMR_OFFSET;
+       if (adev->bios)
+               reserve_size =
+                       amdgpu_atomfirmware_get_fw_reserved_fb_size(adev);
+       if (!reserve_size)
+               reserve_size = DISCOVERY_TMR_OFFSET;
 
        if (mem_train_support) {
                /* reserve vram for mem train according to TMR location */
-               amdgpu_ttm_training_data_block_init(adev);
+               amdgpu_ttm_training_data_block_init(adev, reserve_size);
                ret = amdgpu_bo_create_kernel_at(adev,
                                         ctx->c2p_train_data_offset,
                                         ctx->train_data_size,
@@ -1690,13 +1693,14 @@ static int amdgpu_ttm_reserve_tmr(struct amdgpu_device *adev)
        }
 
        ret = amdgpu_bo_create_kernel_at(adev,
-                               adev->gmc.real_vram_size - adev->mman.discovery_tmr_size,
-                               adev->mman.discovery_tmr_size,
-                               &adev->mman.discovery_memory,
+                               adev->gmc.real_vram_size - reserve_size,
+                               reserve_size,
+                               &adev->mman.fw_reserved_memory,
                                NULL);
        if (ret) {
                DRM_ERROR("alloc tmr failed(%d)!\n", ret);
-               amdgpu_bo_free_kernel(&adev->mman.discovery_memory, NULL, NULL);
+               amdgpu_bo_free_kernel(&adev->mman.fw_reserved_memory,
+                                     NULL, NULL);
                return ret;
        }
 
@@ -1890,8 +1894,9 @@ void amdgpu_ttm_fini(struct amdgpu_device *adev)
        /* return the stolen vga memory back to VRAM */
        amdgpu_bo_free_kernel(&adev->mman.stolen_vga_memory, NULL, NULL);
        amdgpu_bo_free_kernel(&adev->mman.stolen_extended_memory, NULL, NULL);
-       /* return the IP Discovery TMR memory back to VRAM */
-       amdgpu_bo_free_kernel(&adev->mman.discovery_memory, NULL, NULL);
+       /* return the FW reserved memory back to VRAM */
+       amdgpu_bo_free_kernel(&adev->mman.fw_reserved_memory, NULL,
+                             NULL);
        if (adev->mman.stolen_reserved_size)
                amdgpu_bo_free_kernel(&adev->mman.stolen_reserved_memory,
                                      NULL, NULL);
index b391c8d..0fefa5e 100644 (file)
@@ -78,7 +78,8 @@ struct amdgpu_mman {
        /* discovery */
        uint8_t                         *discovery_bin;
        uint32_t                        discovery_tmr_size;
-       struct amdgpu_bo                *discovery_memory;
+       /* fw reserved memory */
+       struct amdgpu_bo                *fw_reserved_memory;
 
        /* firmware VRAM reservation */
        u64             fw_vram_usage_start_offset;